公开(公告)号：US20220208122A1

公开(公告)日：2022-06-30

申请号：US17544503

申请日：2021-12-07

Applicant: Wuhan Tianma Micro-Electronics Co., Ltd.

Inventor： Masamichi SHIMODA ,  Jiro YANASE ,  Yojiro MATSUEDA

IPC: G09G3/3291

Abstract: A driver is configured to maintain a threshold compensation transistor to be ON to write a threshold compensation voltage to a storage capacitor in a threshold compensation period, and write a data signal to the storage capacitor in a data write period after the threshold compensation period. A pulse width of control signal is twice or more as long as the data write period. The driver circuit is configured to turn ON a first transistor with a start edge of a first control signal pulse before the data write period starts, maintain the first transistor to be ON and turn ON a second transistor with a start edge of a second control signal pulse to start the data write period, and turn OFF the first transistor with an end edge of the first control signal pulse to end the data write period.

公开(公告)号：US20230267889A1

公开(公告)日：2023-08-24

申请号：US18308829

申请日：2023-04-28

Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.

Inventor： Jiro YANASE ,  Yojiro MATSUEDA

IPC: G09G3/325

CPC classification number: G09G3/325 ,  G09G2320/046 ,  G09G2330/021

Abstract: A driving transistor is configured to control driving current for the light-emitting element. A first capacitive element and a second capacitive element are connected in series between a gate and a source of the driving transistor. A first switching transistor is configured to switch connection/disconnection between a data line and an intermediate node located between the first capacitive element and the second capacitive element. A second switching transistor is configured to switch connection/disconnection between the gate and a drain of the driving transistor. A third switching transistor is configured to switch connection/disconnection between the intermediate node and a reference power line. A fourth switching transistor is configured to switch supply/non-supply of driving current from the driving transistor to the light-emitting element. A fifth switching transistor is configured to switch connection/disconnection between an anode of the light-emitting element and a reset power line.

公开(公告)号：US20230026192A1

公开(公告)日：2023-01-26

申请号：US17867240

申请日：2022-07-18

Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.

Inventor： Yojiro MATSUEDA ,  Jiro YANASE

IPC: H01L27/32 ,  G09G3/3233 ,  H01L51/00 ,  H01L51/52

Abstract: A second display region has a lower pixel density than a first display region. A third metal layer is located upper than a first metal layer and a second metal layer. The occupancy of the third metal layer in the second display region is lower than the occupancy in the first display region. In a pixel unit, the first metal layer includes a first electrode region to control an amount of electric current in a driving transistor, the second metal layer includes a second electrode region and a third electrode region to supply current to the driving transistor, and the third metal layer includes a main region to form a capacitor included in a capacitive element to store a control voltage for the driving transistor, and an island region surrounded by the main region with a gap and interconnected with a lower electrode region by a via region.

公开(公告)号：US20230024280A1

公开(公告)日：2023-01-26

申请号：US17867254

申请日：2022-07-18

Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.

Inventor： Jiro YANASE ,  Yojiro MATSUEDA

IPC: G09G3/325

Abstract: A driving transistor is configured to control driving current for the light-emitting element. A first capacitive element and a second capacitive element are connected in series between a gate and a source of the driving transistor. A first switching transistor is configured to switch connection/disconnection between a data line and an intermediate node located between the first capacitive element and the second capacitive element. A second switching transistor is configured to switch connection/disconnection between the gate and a drain of the driving transistor. A third switching transistor is configured to switch connection/disconnection between the intermediate node and a reference power line. A fourth switching transistor is configured to switch supply/non-supply of driving current from the driving transistor to the light-emitting element. A fifth switching transistor is configured to switch connection/disconnection between an anode of the light-emitting element and a reset power line.