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公开(公告)号:US20230343298A1
公开(公告)日:2023-10-26
申请号:US18303116
申请日:2023-04-19
Applicant: Wuhan Tianma Micro-Electronics Co., Ltd.
Inventor: Yojiro MATSUEDA , Masamichi Shimoda
IPC: G09G3/3275 , G09G3/00
CPC classification number: G09G3/3275 , G09G3/006 , G09G2320/045 , G09G2310/027 , G09G2330/12
Abstract: A display device determines a gray level for a first pixel based on video data, determines whether the first pixel is in a first deterioration mode or a second deterioration mode following the first deterioration mode based on a driving history of the first pixel, determines a data signal to be supplied to the first pixel based on the gray level and the driving history of the first pixel with reference to first adjustment information for the first deterioration mode in a case of determining that the first pixel is in the first deterioration mode, and determines a data signal to be supplied to the first pixel based on the gray level and the driving history of the first pixel with reference to second adjustment information for the second deterioration mode in a case of determining that the first pixel is in the second deterioration mode.
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公开(公告)号:US20220208122A1
公开(公告)日:2022-06-30
申请号:US17544503
申请日:2021-12-07
Applicant: Wuhan Tianma Micro-Electronics Co., Ltd.
Inventor: Masamichi SHIMODA , Jiro YANASE , Yojiro MATSUEDA
IPC: G09G3/3291
Abstract: A driver is configured to maintain a threshold compensation transistor to be ON to write a threshold compensation voltage to a storage capacitor in a threshold compensation period, and write a data signal to the storage capacitor in a data write period after the threshold compensation period. A pulse width of control signal is twice or more as long as the data write period. The driver circuit is configured to turn ON a first transistor with a start edge of a first control signal pulse before the data write period starts, maintain the first transistor to be ON and turn ON a second transistor with a start edge of a second control signal pulse to start the data write period, and turn OFF the first transistor with an end edge of the first control signal pulse to end the data write period.
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公开(公告)号:US20210035484A1
公开(公告)日:2021-02-04
申请号:US16944740
申请日:2020-07-31
Inventor: Yojiro MATSUEDA , Hiroaki KIMURA
IPC: G09G3/20
Abstract: The display region includes a plurality of subpixel lines. Each of the plurality of subpixel lines include subpixels of a first color, subpixel pairs of a second color, and subpixels of a third color disposed cyclically one by one along a first axis. Between two adjacent subpixel lines, subpixels of the first color are disposed at different positions along the first axis. Between the two adjacent subpixel lines, subpixel pairs of the second color are disposed at different positions along the first axis. Between the two adjacent subpixel lines, subpixels of the third color are disposed at different positions along the first axis. The centroids of two subpixels constituting a subpixel pair of the second color are located at different positions when seen along the first axis and when seen along a second axis perpendicular to the first axis.
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公开(公告)号:US20230267889A1
公开(公告)日:2023-08-24
申请号:US18308829
申请日:2023-04-28
Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Jiro YANASE , Yojiro MATSUEDA
IPC: G09G3/325
CPC classification number: G09G3/325 , G09G2320/046 , G09G2330/021
Abstract: A driving transistor is configured to control driving current for the light-emitting element. A first capacitive element and a second capacitive element are connected in series between a gate and a source of the driving transistor. A first switching transistor is configured to switch connection/disconnection between a data line and an intermediate node located between the first capacitive element and the second capacitive element. A second switching transistor is configured to switch connection/disconnection between the gate and a drain of the driving transistor. A third switching transistor is configured to switch connection/disconnection between the intermediate node and a reference power line. A fourth switching transistor is configured to switch supply/non-supply of driving current from the driving transistor to the light-emitting element. A fifth switching transistor is configured to switch connection/disconnection between an anode of the light-emitting element and a reset power line.
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公开(公告)号:US20210202753A1
公开(公告)日:2021-07-01
申请号:US17123191
申请日:2020-12-16
Inventor: Yojiro MATSUEDA , Genshiro Kawachi
IPC: H01L29/786 , H01L51/52 , H01L51/56 , H01L27/32
Abstract: A display device includes a first polyimide layer, a first silicon oxide layer located above and in direct contact with the first polyimide layer, an amorphous silicon layer located above and in direct contact with the first silicon oxide layer, a second polyimide layer located above and in direct contact with the amorphous silicon layer, a plurality of light-emitting elements located above the second polyimide layer, a transistor array located above the second polyimide layer, the transistor array being configured to control light emission of the plurality of light-emitting elements, a transparent conductive layer located between the transistor array and the second polyimide layer, and a second silicon oxide layer located between and in direct contact with the transparent conductive layer and the second polyimide layer.
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公开(公告)号:US20220208096A1
公开(公告)日:2022-06-30
申请号:US17539654
申请日:2021-12-01
Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Yojiro MATSUEDA
IPC: G09G3/3233 , G09G3/3266 , G09G3/3291
Abstract: A display device includes a display region including pixel circuits, and a driver for outputting a control signal to the pixel circuits. The display region includes a first region and a second region having a lower pixel circuit density than the first region. The driver includes output buffers. Each of the output buffers simultaneously outputs the control signal to the pixel circuits. The output buffers include a first output buffer and a second output buffer. The number of the pixel circuits as output destinations of the control signal of the first output buffer is larger than the number of the pixel circuits as output destinations of the control signal of the second output buffer. A channel width of a drive transistor of the first output buffer is larger than that of a drive transistor of the second output buffer.
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公开(公告)号:US20220028335A1
公开(公告)日:2022-01-27
申请号:US17380134
申请日:2021-07-20
Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Yojiro MATSUEDA , Masamichi SHIMODA
IPC: G09G3/3233
Abstract: A display device includes a display region including display pixels, a control circuit, a first power line pattern, and a second power line pattern. The display region includes a first region and a second region having a lower display pixel density than the first region. The control circuit is configured to supply pixel circuits in the first region with a first power supply potential through the first power line pattern, supply pixel circuits in the second region with a second power supply potential higher than the first power supply potential through the second power line pattern, and supply light-emitting elements of the display pixels in the second region with driving current higher than driving current for the display pixels in the first region for a same grayscale level specified in image data.
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公开(公告)号:US20220028311A1
公开(公告)日:2022-01-27
申请号:US17380120
申请日:2021-07-20
Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Yojiro MATSUEDA , Masamichi SHIMODA
IPC: G09G3/00 , G09G3/3233 , G06F3/044 , H01L27/32
Abstract: A display device includes a display region including display pixels, dummy pixels disposed outside the display region, light blocking films covering the dummy pixels. The display region includes a first region and a second region having a lower display pixel density than the first region. A control circuit is configured to supply the display pixels in the second region with driving current higher than driving current for the first region for the same grayscale level specified in image data, supply each of the dummy pixels with the same data signal as a data signal for the associated display pixel in the second region, measure deterioration of the light-emitting element of each of the dummy pixels, and adjust data signals for the display pixels in the second region associated with the dummy pixels based on results of the measurement.
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公开(公告)号:US20230206845A1
公开(公告)日:2023-06-29
申请号:US18074246
申请日:2022-12-02
Applicant: Wuhan Tianma Micro-Electronics Co., Ltd.
Inventor: Yojiro MATSUEDA
IPC: G09G3/3233 , H10K59/35
CPC classification number: G09G3/3233 , H01L27/3216 , H01L27/3218 , G09G2300/0452 , G09G2300/0413 , G09G2300/0842 , G09G2300/0861 , G09G2300/0819 , G09G2320/0233 , G09G2300/0814 , G09G2300/0465 , G09G2320/0209
Abstract: A display panel includes pixels disposed in a delta-nabla layout. Each data line set consists of three data lines of a data line for a first color, a data line for a second color, and a data line for a third color disposed consecutively. An additional data line for the first color is disposed outside the data line sets. Each pixel circuit for the first color in each of pixel circuit column pairs is supplied with a data signal from a data line for the first color closer to the pixel circuit between the data line for the first color in the associated data line set and the data line for the first color located adjacent to the data line for the third color in the associated data line set outside the associated data line set.
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公开(公告)号:US20230026192A1
公开(公告)日:2023-01-26
申请号:US17867240
申请日:2022-07-18
Applicant: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Yojiro MATSUEDA , Jiro YANASE
IPC: H01L27/32 , G09G3/3233 , H01L51/00 , H01L51/52
Abstract: A second display region has a lower pixel density than a first display region. A third metal layer is located upper than a first metal layer and a second metal layer. The occupancy of the third metal layer in the second display region is lower than the occupancy in the first display region. In a pixel unit, the first metal layer includes a first electrode region to control an amount of electric current in a driving transistor, the second metal layer includes a second electrode region and a third electrode region to supply current to the driving transistor, and the third metal layer includes a main region to form a capacitor included in a capacitive element to store a control voltage for the driving transistor, and an island region surrounded by the main region with a gap and interconnected with a lower electrode region by a via region.
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