公开(公告)号：US07532140B1

公开(公告)日：2009-05-12

申请号：US11487143

申请日：2006-07-13

申请人： William C Rempfer ,  Hassan Malik ,  James L Brubaker

发明人： William C Rempfer ,  Hassan Malik ,  James L Brubaker

IPC分类号： H03M1/68

CPC分类号： H03M1/0678 ,  H03M1/0643 ,  H03M1/765

摘要： Digital to analog converter circuits and methods are provided for producing an analog output voltage indicative of a digital input signal with at least partial insensitivity to error gradients. Described are split-core resistive elements, which include a plurality of one-dimensional or multi-dimensional resistive strings, that may be used to reduce or substantially eliminate the effects that error gradients have on the linearity of the analog output voltages of a resistive string or interpolating amplifier DACs. The resistor strings that make up the split-core resistive elements are configured in such a manner that combining respective output voltages from each of the resistor strings results in an analog output voltage that is at least partially insensitive to the effects of error gradients.

摘要翻译： 提供数模转换器电路和方法用于产生表示对错误梯度至少部分不敏感的数字输入信号的模拟输出电压。 描述的是分离电阻元件，其包括多个一维或多维电阻串，其可用于减少或基本上消除误差梯度对电阻串的模拟输出电压的线性的影响 或内插放大器DAC。 构成分离电阻元件的电阻串以这样的方式配置，即组合来自每个电阻器串的各个输出电压导致对误差梯度的影响至少部分不敏感的模拟输出电压。