公开(公告)号：US07409077B2

公开(公告)日：2008-08-05

申请号：US11130632

申请日：2005-05-16

申请人： William F. Jones ,  John E. Breeding ,  Bryan Castleberry ,  Johnny Reed

发明人： William F. Jones ,  John E. Breeding ,  Bryan Castleberry ,  Johnny Reed

IPC分类号： G06K9/00

CPC分类号： G01T1/2985 ,  A61B6/037

摘要： A projection data rebinning device for nearest-neighbor rebinning in Positron Emission Tomography (PET) using on-line 3D axial LOR-to-bin mapping. The PETLINK™ DMA Rebinner (PDR) of the present invention includes a PCI card for on-line translation of detector-pair event packets into bin-address packets. The PDR delivers accurate axial and transaxial LOR nearest-neighbor rebinning and enables the more oblique LOR to be mapped into the proper sinogram bins. The PDR is used in association with hardware architecture in electrical communication with a medical imaging device. The data acquisition architecture includes a processor, random access memory (RAM), an operating system, and a data storage device. The PDR includes a plurality of FPGAs and flash chips. The FPGAs are in communication with each other via a high-bandwidth connection. The flash memory chips are used for look-up tables. The PDR performs on-line translation of detector-pair event packets into bin-address packets.

摘要翻译： 一种投影数据重组装置，用于在正电子发射断层扫描（PET）中使用在线三维轴向LOR到箱体映射进行最近邻重组。 本发明的PETLINK TM DMA Rebinner（PDR）包括用于将检测器对事件分组在线转换成bin-地址分组的PCI卡。 PDR提供精确的轴向和横轴LOR最近邻重组，并使更多的倾斜LOR映射到正确的正弦图形箱。 PDR与与医学成像设备电通信的硬件结构相关联使用。 数据采集​​架构包括处理器，随机存取存储器（RAM），操作系统和数据存储设备。 PDR包括多个FPGA和闪存芯片。 FPGA通过高带宽连接彼此通信。 闪存芯片用于查找表。 PDR将检测器对事件数据包进行在线转换，进入bin-address数据包。

公开(公告)号：US20100074498A1

公开(公告)日：2010-03-25

申请号：US12558026

申请日：2009-09-11

申请人： John E. Breeding ,  William F. Jones ,  Wing K. Luk ,  Andrew P. Moor ,  Johnny H. Reed ,  David Townsend

发明人： John E. Breeding ,  William F. Jones ,  Wing K. Luk ,  Andrew P. Moor ,  Johnny H. Reed ,  David Townsend

IPC分类号： G06K9/00

CPC分类号： G06T11/005

摘要： A patient bed drive mechanism, under control of a processor, is capable of continuously moving a patient bed through the a TOF-PET detector array having a stationary field of view (FOV) for a distance in excess of the physical extent of an axis of the array FOV. A direct memory access (DMA) rebinner card is coupled to the detector array to receive therefrom a stream of TOF-PET coincidence event data during the extent of movement of the bed. Image projection data are generated in real time from the acquired stream of TOF-PET coincidence event data via the DMA card.

摘要翻译： 在处理器的控制下，患者床驱动机构能够通过具有静止视野（FOV）的TOF-PET检测器阵列连续地移动患者床，距离超过轴的物理范围 阵列FOV。 直接存储器访问（DMA）重组卡耦合到检测器阵列以在床的移动范围内从其接收TOF-PET重合事件数据流。 图像投影数据通过DMA卡从所获取的TOF-PET符合事件数据流中实时生成。

公开(公告)号：US20090313430A1

公开(公告)日：2009-12-17

申请号：US12437714

申请日：2009-05-08

申请人： William F. Jones ,  John E. Breeding ,  Johnny H. Reed ,  Jimmy Everman

发明人： William F. Jones ,  John E. Breeding ,  Johnny H. Reed ,  Jimmy Everman

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G16H40/63 ,  G06F19/00

摘要： PET system including array, data processing, and data acquisition. Data acquisition includes one-to-N channel write striping, N-to-one channel read unstriping, N data storage elements, and control logic. Control logic allocates (statically or dynamically) write/read access to data storage elements. Dynamic allocation can be conditional, e.g., that data storage elements be available to receive all input data from array. Embodiments include an input buffer where the condition is determined dynamically based on capacity of the input buffer to temporarily preserve all input data supplied during periods data storage element unavailability. Communication between array and data acquisition can be Fibre Channel simplex implementing only FC-0, FC-1. Data storage elements have data handling bandwidth equal to or greater than (data output rate /N) plus (data input rate/N). Control logic, write striping, read unstriping can be implemented in FPGA. Data storage elements can form a Redundant Array of Independent Disks, e.g., RAID 0.

摘要翻译： PET系统包括阵列，数据处理和数据采集。 数据采集​​包括一对N通道写条带，N对1通道读取，N个数据存储元件和控制逻辑。 控制逻辑分配（静态或动态）对数据存储元素的写/读访问。 动态分配可以是有条件的，例如，数据存储元件可用于从阵列接收所有输入数据。 实施例包括输入缓冲器，其中基于输入缓冲器的容量动态地确定条件，以暂时保留在数据存储元件不可用期间提供的所有输入数据。 阵列和数据采集之间的通信可以是仅实现FC-0，FC-1的光纤通道单工。 数据存储元件的数据处理带宽等于或大于（数据输出速率/ N）加（数据输入速率/ N）。 FPGA中可以实现控制逻辑，写条带，读取取消。 数据存储元件可以形成独立磁盘的冗余阵列，例如RAID 0。

公开(公告)号：US08314380B2

公开(公告)日：2012-11-20

申请号：US12558026

申请日：2009-09-11

申请人： John E. Breeding ,  William F. Jones ,  Wing K. Luk ,  Andrew P. Moor ,  Johnny H. Reed ,  David Townsend

发明人： John E. Breeding ,  William F. Jones ,  Wing K. Luk ,  Andrew P. Moor ,  Johnny H. Reed ,  David Townsend

IPC分类号： H01J49/00 ,  G01T1/161

CPC分类号： G06T11/005

摘要： A patient bed drive mechanism, under control of a processor, is capable of continuously moving a patient bed through the a TOF-PET detector array having a stationary field of view (FOV) for a distance in excess of the physical extent of an axis of the array FOV. A direct memory access (DMA) rebinner card is coupled to the detector array to receive therefrom a stream of TOF-PET coincidence event data during the extent of movement of the bed. Image projection data are generated in real time from the acquired stream of TOF-PET coincidence event data via the DMA card.

摘要翻译： 在处理器的控制下，患者床驱动机构能够通过具有静止视野（FOV）的TOF-PET检测器阵列连续地移动患者床，距离超过轴的物理范围 阵列FOV。 直接存储器访问（DMA）重组卡耦合到检测器阵列以在床的移动范围内从其接收TOF-PET重合事件数据流。 图像投影数据通过DMA卡从所获取的TOF-PET符合事件数据流中实时生成。

公开(公告)号：US08060696B2

公开(公告)日：2011-11-15

申请号：US12437714

申请日：2009-05-08

申请人： William F. Jones ,  John E. Breeding ,  Johnny H. Reed ,  Jimmy Everman

发明人： William F. Jones ,  John E. Breeding ,  Johnny H. Reed ,  Jimmy Everman

IPC分类号： G06F12/16

CPC分类号： G16H40/63 ,  G06F19/00

摘要： PET system including array, data processing, and data acquisition. Data acquisition includes one-to-N channel write striping, N-to-one channel read unstriping, N data storage elements, and control logic. Control logic allocates (statically or dynamically) write/read access to data storage elements. Dynamic allocation can be conditional, e.g., that data storage elements be available to receive all input data from array. Embodiments include an input buffer where the condition is determined dynamically based on capacity of the input buffer to temporarily preserve all input data supplied during periods data storage element unavailability. Communication between array and data acquisition can be Fibre Channel simplex implementing only FC-0, FC-1. Data storage elements have data handling bandwidth equal to or greater than (data output rate /N) plus (data input rate/N). Control logic, write striping, read unstriping can be implemented in FPGA. Data storage elements can form a Redundant Array of Independent Disks, e.g., RAID 0.

摘要翻译： PET系统包括阵列，数据处理和数据采集。 数据采集​​包括一对N通道写条带，N对1通道读取，N个数据存储元件和控制逻辑。 控制逻辑分配（静态或动态）对数据存储元素的写/读访问。 动态分配可以是有条件的，例如，数据存储元件可用于从阵列接收所有输入数据。 实施例包括输入缓冲器，其中基于输入缓冲器的容量动态地确定条件，以暂时保留在数据存储元件不可用期间提供的所有输入数据。 阵列和数据采集之间的通信可以是仅实现FC-0，FC-1的光纤通道单工。 数据存储元件的数据处理带宽等于或大于（数据输出速率/ N）加（数据输入速率/ N）。 FPGA中可以实现控制逻辑，写条带，读取取消。 数据存储元件可以形成独立磁盘的冗余阵列，例如RAID 0。

公开(公告)号：US07983186B2

公开(公告)日：2011-07-19

申请号：US12558055

申请日：2009-09-11

申请人： John E. Breeding ,  Michael E. Casey ,  Jimmy Everman ,  William F. Jones ,  Wing K. Luk ,  Johnny H. Reed

发明人： John E. Breeding ,  Michael E. Casey ,  Jimmy Everman ,  William F. Jones ,  Wing K. Luk ,  Johnny H. Reed

IPC分类号： H04L12/26

CPC分类号： G01T1/00 ,  H04L67/12 ,  H04L69/40

摘要： A system identifies when received packets are lost at a node in a multi-node processing chain. The system processing chain may include a gantry interface module for receiving coincident event data from a PET (Positron Emission Tomography) detector array, a DMA (direct memory access) rebinner card, and a transmission line coupled between the gantry interface module and the DMA card. FPGA and FIFO elements in each processing portion receive packets that may be lost if there is insufficient FIFO capacity. Lost packets are marked, discarded, and counted. At specified intervals, set in accordance with a threshold number of packets received a lost tally data packet is generated that includes count information for lost packets. The lost tally data packet is forwarded downstream when sufficient storage capacity exists.

摘要翻译： 系统识别在多节点处理链中的节点处收到的数据包丢失的情况。 系统处理链可以包括用于从PET（正电子发射断层扫描）检测器阵列，DMA（直接存储器访问）重新接收器卡和耦合在台架接口模块和DMA卡之间的传输线接收重合事件数据的龙门架接口模块 。 每个处理部分的FPGA和FIFO元素接收到如果FIFO容量不足可能会丢失的数据包。 丢失的数据包被标记，丢弃和计数。 按指定间隔设置，根据接收到的丢包数据包的阈值数量，生成包括丢失数据包的计数信息。 当存在足够的存储容量时，丢失的计数数据分组被转发到下游。

公开(公告)号：US20100061263A1

公开(公告)日：2010-03-11

申请号：US12558055

申请日：2009-09-11

申请人： John E. Breeding ,  Michael E. Casey ,  Jimmy Everman ,  William F. Jones ,  Johhny H. Reed ,  Wing K. Luk

发明人： John E. Breeding ,  Michael E. Casey ,  Jimmy Everman ,  William F. Jones ,  Johhny H. Reed ,  Wing K. Luk

IPC分类号： H04L12/26

CPC分类号： G01T1/00 ,  H04L67/12 ,  H04L69/40

摘要： A system identifies when received packets are lost at a node in a multi-node processing chain. The system processing chain may include a gantry interface module for receiving coincident event data from a PET (Positron Emission Tomography) detector array, a DMA (direct memory access) rebinner card, and a transmission line coupled between the gantry interface module and the DMA card. FPGA and FIFO elements in each processing portion receive packets that may be lost if there is insufficient FIFO capacity. Lost packets are marked, discarded, and counted. At specified intervals, set in accordance with a threshold number of packets received a lost tally data packet is generated that includes count information for lost packets. The lost tally data packet is forwarded downstream when sufficient storage capacity exists.

摘要翻译： 系统识别在多节点处理链中的节点处收到的数据包丢失的情况。 系统处理链可以包括用于从PET（正电子发射断层扫描）检测器阵列，DMA（直接存储器访问）重新接收器卡和耦合在台架接口模块和DMA卡之间的传输线接收重合事件数据的龙门架接口模块 。 每个处理部分的FPGA和FIFO元素接收到如果FIFO容量不足可能会丢失的数据包。 丢失的数据包被标记，丢弃和计数。 按指定间隔设置，根据接收到的丢包数据包的阈值数量，生成包括丢失数据包的计数信息。 当存在足够的存储容量时，丢失的计数数据分组被转发到下游。

公开(公告)号：US07638771B2

公开(公告)日：2009-12-29

申请号：US11749434

申请日：2007-05-16

申请人： John E. Breeding ,  Michael E. Casey ,  William F Jones

发明人： John E. Breeding ,  Michael E. Casey ,  William F Jones

IPC分类号： G01T1/166

CPC分类号： G06T11/005

摘要： A system for generating time-of-flight (TOF) positron emission tomography (PET) projection data includes a direct memory access rebinner constructed as a digital FPGA pipeline for rebinning TOF coincidence data in accordance with a number of projection space mapping algorithms, such as single-slice rebinning (SSRB) and reduced multiple-slice rebinning (MSRB), together with less precise transaxial and/or axial sampling.

摘要翻译： 用于产生飞行时间（TOF）正电子发射断层摄影（PET）投影数据的系统包括构造为数字FPGA流水线的直接存储器访问重组器，用于根据多个投影空间映射算法重新组合TOF重合数据，例如 单片重组（SSRB）和减少的多片重组（MSRB），以及较不精确的横轴和/或轴向采样。

公开(公告)号：US06903344B2

公开(公告)日：2005-06-07

申请号：US10396543

申请日：2003-03-25

申请人： John E. Breeding ,  John W. Young ,  Mark Musrock

发明人： John E. Breeding ,  John W. Young ,  Mark Musrock

IPC分类号： G01T1/164 ,  G01T1/29

CPC分类号： G01T1/2985 ,  A61B6/037

摘要： A method and apparatus for determining and correcting the baseline of a continuously sampled signal for use in positron emission tomography. The method employs continuous signal sampling to determine the signal level at time t(0) so that an accurate determination of an integrated signal may be calculated, resulting in an accurate energy estimate for an ac-coupled, continuously-sampled signal at various count rates. The device includes a front-end electronics processing channel including primarily an analog CMOS ASIC, a bank of ADCs, an FPGA-based digital sequencer, and two RAMs. The processing electronics perform continuous digital integration of PMT signals to obtain normalized position and energy. Continuous baseline restoration (BLR) is used, wherein the baseline of the signal pulses are placed at mid-scale by continuously sampling the ADC, thus always making available the past history. A correction signal is generated for use in negative feedback control of the baseline.

摘要翻译： 一种用于确定和校正用于正电子发射断层摄影的连续采样信号的基线的方法和装置。 该方法采用连续信号采样来确定时间t（0）处的信号电平，从而可以计算积分信号的精确确定，从而得到以不同计数速率的交流耦合连续采样信号的精确能量估计 。 该器件包括一个前端电子处理通道，主要包括模拟CMOS ASIC，一组ADC，基于FPGA的数字定序器和两个RAM。 处理电子执行PMT信号的连续数字集成以获得归一化的位置和能量。 使用连续基线恢复（BLR），其中通过连续采样ADC将信号脉冲的基线置于中等尺度，从而始终提供过去的历史。 生成用于基线负反馈控制的校正信号。

公开(公告)号：US08170855B2

公开(公告)日：2012-05-01

申请号：US12110485

申请日：2008-04-28

申请人： William Jones ,  John E. Breeding ,  Johnny H. Reed ,  Jimmy Everman ,  Michael E. Casey

发明人： William Jones ,  John E. Breeding ,  Johnny H. Reed ,  Jimmy Everman ,  Michael E. Casey

IPC分类号： G06F17/50

CPC分类号： G06F11/261

摘要： A system for simulating a Positron Emission Tomography (PET) gantry has a computer system having a bus system for receiving expansion cards, a mass data storage support system, the mass storage system being operable to store coincidence-event and tag packet data, and a data transfer simulation card for said bus system, wherein the data transfer simulation card is operable to simulate transfer timing of the stored coincidence-event and tag packet data.

摘要翻译： 用于模拟正电子发射断层扫描（PET）龙门架的系统具有计算机系统，其具有用于接收扩展卡的总线系统，大容量数据存储支持系统，大容量存储系统可操作以存储符合事件和标签分组数据，以及 用于所述总线系统的数据传输模拟卡，其中数据传输模拟卡可操作以模拟存储的符合事件和标签分组数据的传送定时。