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公开(公告)号：US08060719B2
公开(公告)日：2011-11-15
申请号：US12127945
申请日：2008-05-28
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/1036 , G06F2212/7201 , G06F2212/7211 , G11C16/349 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in hybrid memory devices utilizing single level and multi level memory cells. Logical addresses can be distributed between single level and multilevel memory cells based on a frequency of write operations performed. Initial storage of data corresponding to a logical address in memory can be determined by various methods including initially writing all data to single level memory or initially writing all data to multilevel memory. Other methods permit a host to direct logical address writes to single level or multilevel memory cells based on anticipated usage.
摘要翻译： 用于使用单级和多级存储器单元来管理混合存储器件中的数据存储的方法和装置。 逻辑地址可以基于执行的写操作的频率在单级和多级存储器单元之间分配。 可以通过各种方法来确定与存储器中的逻辑地址相对应的数据的初始存储，包括首先将所有数据写入单级存储器或者首先将所有数据写入多级存储器。 其他方法允许主机根据预期用途将逻辑地址写入指向单级或多级存储器单元。
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公开(公告)号：US08296510B2
公开(公告)日：2012-10-23
申请号：US13295616
申请日：2011-11-14
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/1036 , G06F2212/7201 , G06F2212/7211 , G11C16/349 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in hybrid memory devices utilizing single level and multi level memory cells. Logical addresses can be distributed between single level and multilevel memory cells based on a frequency of write operations performed. Initial storage of data corresponding to a logical address in memory can be determined by various methods including initially writing all data to single level memory or initially writing all data to multilevel memory. Other methods permit a host to direct logical address writes to single level or multilevel memory cells based on anticipated usage.
摘要翻译： 用于使用单级和多级存储器单元来管理混合存储器件中的数据存储的方法和装置。 逻辑地址可以基于执行的写操作的频率在单级和多级存储器单元之间分配。 可以通过各种方法来确定与存储器中的逻辑地址相对应的数据的初始存储，包括首先将所有数据写入单级存储器或者首先将所有数据写入多级存储器。 其他方法允许主机根据预期用途将逻辑地址写入指向单级或多级存储器单元。
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公开(公告)号：US20120059992A1
公开(公告)日：2012-03-08
申请号：US13295616
申请日：2011-11-14
IPC分类号： G06F12/08
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/1036 , G06F2212/7201 , G06F2212/7211 , G11C16/349 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in hybrid memory devices utilizing single level and multi level memory cells. Logical addresses can be distributed between single level and multilevel memory cells based on a frequency of write operations performed. Initial storage of data corresponding to a logical address in memory can be determined by various methods including initially writing all data to single level memory or initially writing all data to multilevel memory. Other methods permit a host to direct logical address writes to single level or multilevel memory cells based on anticipated usage.
摘要翻译： 用于使用单级和多级存储器单元来管理混合存储器件中的数据存储的方法和装置。 逻辑地址可以基于执行的写操作的频率在单级和多级存储器单元之间分配。 可以通过各种方法来确定与存储器中的逻辑地址相对应的数据的初始存储，包括首先将所有数据写入单级存储器或者首先将所有数据写入多级存储器。 其他方法允许主机根据预期用途将逻辑地址写入指向单级或多级存储器单元。
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公开(公告)号：US20090300269A1
公开(公告)日：2009-12-03
申请号：US12127945
申请日：2008-05-28
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/1036 , G06F2212/7201 , G06F2212/7211 , G11C16/349 , G11C2211/5641
摘要： Methods and apparatus for managing data storage in hybrid memory devices utilizing single level and multi level memory cells. Logical addresses can be distributed between single level and multilevel memory cells based on a frequency of write operations performed. Initial storage of data corresponding to a logical address in memory can be determined by various methods including initially writing all data to single level memory or initially writing all data to multilevel memory. Other methods permit a host to direct logical address writes to single level or multilevel memory cells based on anticipated usage.
摘要翻译： 用于使用单级和多级存储器单元来管理混合存储器件中的数据存储的方法和装置。 逻辑地址可以基于执行的写操作的频率在单级和多级存储器单元之间分配。 可以通过各种方法来确定与存储器中的逻辑地址相对应的数据的初始存储，包括首先将所有数据写入单级存储器或者首先将所有数据写入多级存储器。 其他方法允许主机根据预期用途将逻辑地址写入指向单级或多级存储器单元。
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公开(公告)号：US08296545B2
公开(公告)日：2012-10-23
申请号：US13107513
申请日：2011-05-13
申请人： Petro Estakhri , Martin Ragnar Furuhjelm , Ngon Le , Jerrold Allen Beckmann , Neal Anthony Galbo , Steffen Markus Hellmold , Jarreth Romero Solomon
发明人： Petro Estakhri , Martin Ragnar Furuhjelm , Ngon Le , Jerrold Allen Beckmann , Neal Anthony Galbo , Steffen Markus Hellmold , Jarreth Romero Solomon
IPC分类号： G06F12/00
摘要： In one embodiment of the present invention, a memory device is disclosed to include memory organized into blocks, each block having a status associated therewith and all of the blocks of the nonvolatile memory having collectively a capacity status associated therewith and a display for showing the capacity status even when no power is being applied to the display.
摘要翻译： 在本发明的一个实施例中，公开了一种存储器件，其包括被组织成块的存储器，每个块具有与之相关联的状态，并且所述非易失性存储器的所有块共同地与其相关联的容量状态以及用于显示容量的显示器 即使没有电源被施加到显示器上也是如此。
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公开(公告)号：US20100231408A1
公开(公告)日：2010-09-16
申请号：US12787538
申请日：2010-05-26
CPC分类号： G11C16/349 , G11C16/04 , G11C29/50 , G11C29/56 , G11C29/76 , G11C2029/5002
摘要： An apparatus includes a display configured to display a health status of a memory device, where the health status is indicative of an amount of spare memory the memory device has available to replace memory of the memory device that may become defective.
摘要翻译： 一种装置包括被配置为显示存储设备的健康状态的显示器，其中健康状态指示存储器设备可用于替换可能变得有缺陷的存储器设备的存储器的备用存储器的量。
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7.发明授权Systems, methods and devices for control of the operation of data storage devices using solid-state memory and monitoring energy used therein 有权用于控制使用固态存储器的数据存储设备的操作和监视其中使用的能量的系统，方法和设备公开(公告)号：US08468370B2
公开(公告)日：2013-06-18
申请号：US12560868
申请日：2009-09-16
CPC分类号： G06F1/263 , G06F1/30 , G06F3/0656 , G06F3/0679 , G06F11/1441 , G06F12/0804 , Y02D10/13
摘要： A variety of data storage devices, methods and systems are implemented for control of memory associated with backup functionality. One such data storage device includes a power circuit that provides main power. The data storage device has a first solid-state memory circuit that maintains data in the absence of electrical power. A second memory circuit is subject to data loss in the absence of electrical power. A storage circuit stores energy and provides the stored energy to the second memory circuit in response to a loss of main power. A test circuit discharges a portion of the stored energy to provide output data indicative of power-providing capabilities of the storage circuit. A memory controller controls data transfers to the data storage device by temporarily storing data destined for the first solid-state memory circuit and setting the amount of memory available for temporary storage in response to the output data.
摘要翻译： 实现各种数据存储设备，方法和系统以控制与备份功能相关联的存储器。 一个这样的数据存储装置包括提供主电源的电源电路。 数据存储装置具有在不存在电力的情况下维持数据的第一固态存储电路。 第二存储器电路在没有电力的情况下遭受数据丢失。 存储电路存储能量并且响应于主功率的损失将存储的能量提供给第二存储器电路。 测试电路对存储的能量的一部分进行放电以提供指示存储电路的功率提供能力的输出数据。 存储器控制器通过临时存储去往第一固态存储器电路的数据并且响应于输出数据设置可用于临时存储的存储器的量来控制对数据存储设备的数据传输。
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公开(公告)号：US20110219175A1
公开(公告)日：2011-09-08
申请号：US13107513
申请日：2011-05-13
申请人： Petro Estakhri , Martin Ragnar Furuhjelm , Ngon Le , Jerrold Allen Beckmann , Neal Anthony Galbo , Steffen Markus Hellmold , Jarreth Romero Solomon
发明人： Petro Estakhri , Martin Ragnar Furuhjelm , Ngon Le , Jerrold Allen Beckmann , Neal Anthony Galbo , Steffen Markus Hellmold , Jarreth Romero Solomon
IPC分类号： G06F12/00
摘要： In one embodiment of the present invention, a memory device is disclosed to include memory organized into blocks, each block having a status associated therewith and all of the blocks of the nonvolatile memory having collectively a capacity status associated therewith and a display for showing the capacity status even when no power is being applied to the display.
摘要翻译： 在本发明的一个实施例中，公开了一种存储器件，其包括被组织成块的存储器，每个块具有与之相关联的状态，并且所述非易失性存储器的所有块共同地与其相关联的容量状态以及用于显示容量的显示器 即使没有电源被施加到显示器上也是如此。
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9.发明申请SYSTEMS, METHODS AND DEVICES FOR CONTROL OF THE OPERATION OF DATA STORAGE DEVICES USING SOLID-STATE MEMORY 有权用于控制使用固态存储器的数据存储设备的操作的系统，方法和设备公开(公告)号：US20110066872A1
公开(公告)日：2011-03-17
申请号：US12560868
申请日：2009-09-16
CPC分类号： G06F1/263 , G06F1/30 , G06F3/0656 , G06F3/0679 , G06F11/1441 , G06F12/0804 , Y02D10/13
摘要： A variety of data storage devices, methods and systems are implemented for control of memory associated with backup functionality. One such data storage device includes a power circuit that provides main power. The data storage device has a first solid-state memory circuit that maintains data in the absence of electrical power. A second memory circuit is subject to data loss in the absence of electrical power. A storage circuit stores energy and provides the stored energy to the second memory circuit in response to a loss of main power. A test circuit discharges a portion of the stored energy to provide output data indicative of power-providing capabilities of the storage circuit. A memory controller controls data transfers to the data storage device by temporarily storing data destined for the first solid-state memory circuit and setting the amount of memory available for temporary storage in response to the output data.
摘要翻译： 实现各种数据存储设备，方法和系统以控制与备份功能相关联的存储器。 一个这样的数据存储装置包括提供主电源的电源电路。 数据存储装置具有在不存在电力的情况下维持数据的第一固态存储电路。 第二存储器电路在没有电力的情况下遭受数据丢失。 存储电路存储能量并且响应于主功率的损失将存储的能量提供给第二存储器电路。 测试电路对存储的能量的一部分进行放电以提供指示存储电路的功率提供能力的输出数据。 存储器控制器通过临时存储去往第一固态存储器电路的数据并且响应于输出数据设置可用于临时存储的存储器的量来控制对数据存储设备的数据传输。
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公开(公告)号：US20090327595A1
公开(公告)日：2009-12-31
申请号：US12555574
申请日：2009-09-08
申请人： Petro Estakhri , Martin Ragnar Furuhjelm , Ngon Le , Jerrold Allen Beckmann , Neal Anthony Galbo , Steffen Markus Hellmold , Jarreth Romero Solomon
发明人： Petro Estakhri , Martin Ragnar Furuhjelm , Ngon Le , Jerrold Allen Beckmann , Neal Anthony Galbo , Steffen Markus Hellmold , Jarreth Romero Solomon
摘要： In one embodiment of the present invention, a memory device is disclosed to include memory organized into blocks, each block having a status associated therewith and all of the blocks of the nonvolatile memory having collectively a capacity status associated therewith and a display for showing the capacity status even when no power is being applied to the display.
摘要翻译： 在本发明的一个实施例中，公开了一种存储器件，其包括被组织成块的存储器，每个块具有与之相关联的状态，并且所述非易失性存储器的所有块共同地与其相关联的容量状态以及用于显示容量的显示器 即使没有电源被施加到显示器上也是如此。
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