-
公开(公告)号:US20240249768A1
公开(公告)日:2024-07-25
申请号:US18564481
申请日:2022-05-31
发明人: Kaiyuan Yang , Dai Li
IPC分类号: G11C11/419 , G11C15/04
CPC分类号: G11C11/419 , G11C15/04
摘要: The present application relates to a method for generating a random sample of an arbitrary distribution. The method includes precomputing a cumulative distribution table (CDT) of the distribution; storing the CDT in an array of range matching content-addressable memory (CAM) cells; inputting data through a search line (SL); comparing the input data against stored data in the CDT using the array of range matching CAM cells; when the input data match the stored data, turning on all pass gates that are controlled by logic gates and shorting a match line (ML) from MSB to LSB; and determining the range matching result on the ML and outputting data points corresponding to an index of the matched row in CDT, when the input data do not match the stored data, determining an interval of stored data that the input data falls into, and outputting the data points corresponding to the interval.
-
公开(公告)号:US20240106664A1
公开(公告)日:2024-03-28
申请号:US18264369
申请日:2022-02-04
发明人: Kaiyuan Yang , Yan He
IPC分类号: H04L9/32
CPC分类号: H04L9/3278 , H04L2209/26
摘要: A method and circuit for an Automatic Self Checking and Healing (ASCH) of Physically Unclonable Functions (PUFs), the method includes: controlling a skew input added to each PUF cell of a PUF array in a circuit with sub-mV resolution; healing a portion of unstable bits of each PUF cells locally; and performing a second self-checking on healed PUF cells to determine final PUF cells to discard. The method further includes performing at least one of a static operation mode, a dynamic operation mode, and a hybrid operation mode of ASCH stabilization system based on design needs to reconfigure and mask the PUF array to achieve less than 1E-8 Bit Error Rate (BER) with less than 25% masking ratio. The circuit includes the skew input, a self-checking controller, a high-speed readout, a validity detector, and a Digital-to-Analog Converter (DAC). Further, each PUF cell in the PUF array is an inverter-based PUF and includes a first stage inverter and a second stage inverter such that the second stage inverter includes other stages except the first stage inverter.
-
公开(公告)号:US20240045655A1
公开(公告)日:2024-02-08
申请号:US17761116
申请日:2022-03-11
发明人: Kaiyuan Yang , Zhiyu Chen
IPC分类号: G06F7/544 , G11C11/412 , G11C11/419
CPC分类号: G06F7/5443 , G11C11/412 , G11C11/419
摘要: A charge-domain IMC circuit is disclosed and includes: a cluster of 6T SRAM cells; a charge- domain MAC circuit; and an LBL connected to a bit-line of each of the 6T SRAM cells. The MAC circuit includes: a MOS transistor; an input switch; an output switch; an input port; an output port; and a capacitor. The LBL is connected to a gate of the MOS transistor. A first terminal of the MOS transistor is connected to a DC voltage, and a second terminal of the MOS transistor is connected to the output port via the output switch. The second terminal of the MOS transistor is connected to the input port via the input switch and to a first side of the capacitor. A second side of the capacitor is grounded. Other variants of the IMC circuit are disclosed, some of which having a ciSAR ADC or a TD-ADC.
-
-