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公开(公告)号：US5708563A
公开(公告)日：1998-01-13
申请号：US683346
申请日：1996-07-18
申请人： William Vincent Cranston, III , Robert Allen Hood , Frederick Charles Yentz , Jose Platon Basco
发明人： William Vincent Cranston, III , Robert Allen Hood , Frederick Charles Yentz , Jose Platon Basco
CPC分类号： G06F1/185 , G06F1/184 , G06F1/186 , H05K7/1408 , H05K7/1429
摘要： A computer includes a main enclosure for housing a plurality of computer components. A subenclosure or card cage for housing a planar circuit board, including a CPU, and at least one accessory board may be removably secured within the main enclosure, wherein the subenclosure, planar circuit board, and accessory circuit board may be selectively removed from the main enclosure as a unit. A connection device is provided to releasably electrically connect at least the planar circuit board to one of the computer components housed within the main enclosure.
摘要翻译： 计算机包括用于容纳多个计算机组件的主外壳。 用于容纳平面电路板（包括CPU）和至少一个附属板的防护罩或卡笼可以可移除地固定在主外壳内，其中，防拆罩，平面电路板和附件电路板可以从主体 外壳作为一个单元。 提供连接装置以将至少平面电路板可释放地电连接到容纳在主外壳内的计算机部件之一。
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公开(公告)号：US6049449A
公开(公告)日：2000-04-11
申请号：US959776
申请日：1997-10-29
申请人： William Vincent Cranston, III , Robert Allen Hood , Frederick Charles Yentz , Jose Platon Basco
发明人： William Vincent Cranston, III , Robert Allen Hood , Frederick Charles Yentz , Jose Platon Basco
CPC分类号： G06F1/185 , G06F1/184 , G06F1/186 , H05K7/1408 , H05K7/1429
摘要： A computer includes a main enclosure for housing a plurality of computer components. A subenclosure or card cage for housing a planar circuit board, including a CPU means, and at least one accessory board may be removably secured within the main enclosure, wherein the subenclosure, planar circuit board, and accessory circuit board may be selectively removed from the main enclosure as a unit. A connection means is provided to releasably electrically connect at least the planar circuit board to one of the computer components housed within the main enclosure.
摘要翻译： 计算机包括用于容纳多个计算机组件的主外壳。 用于容纳包括CPU装置的平面电路板和至少一个附件板的平板电路板或卡笼可以可移除地固定在主外壳内，其中，可以选择性地从该罩壳，平面电路板和附件电路板 主机外壳为一体。 提供连接装置以将至少平面电路板可释放地电连接到容纳在主外壳内的计算机部件之一。
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公开(公告)号：US06188571B1
公开(公告)日：2001-02-13
申请号：US08963841
申请日：1997-11-03
IPC分类号： G06F116
摘要： The present invention provides a method and apparatus for a mass storage subsystem such as a RAID array. The invention includes a housing which defines first and second cavities with the first cavity housing an array controller such as a RAID controller. The second cavity houses a plurality of substantially conventional IDE drives conforming to the 3.5″ form factor. The array is configured to maximize cooling of the array controller and the drives within the extremely small space defined by the housing.
摘要翻译： 本发明提供了一种用于诸如RAID阵列的大容量存储子系统的方法和装置。 本发明包括限定第一和第二空腔的壳体，其中第一空腔容纳诸如RAID控制器的阵列控制器。 第二腔容纳符合3.5“形状因子的多个基本上常规的IDE驱动器。 该阵列被配置为使阵列控制器和驱动器在由壳体限定的极小空间内最大限度地冷却。
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公开(公告)号：US5938744A
公开(公告)日：1999-08-17
申请号：US964229
申请日：1997-11-04
CPC分类号： G06F13/28 , G06F2003/0692 , G06F3/0601
摘要： The present invention provides a method and apparatus whereby a single engine can manage multiple DMA queues and related functions for a mass storage subsystem such as a RAID array. By operating the engine at a suitably high clock rate, the key buses may be time multiplexed such that each bus operates at substantially its optimum frequency to maintain high efficiency of data throughput. To improve performance further, the DMA addressing function is allocated additional phases whenever the remaining buses have not requested access to the RAID engine.
摘要翻译： 本发明提供了一种方法和装置，其中单个引擎可以管理诸如RAID阵列之类的大容量存储子系统的多个DMA队列和相关功能。 通过以适当的高时钟速率操作发动机，可以对密钥总线进行时间复用，使得每个总线基本上以其最佳频率运行，以保持数据吞吐量的高效率。 为了进一步提高性能，只要剩余的总线没有请求访问RAID引擎，DMA寻址功能就被分配给其他阶段。
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