SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

    公开(公告)号:US20210257257A1

    公开(公告)日:2021-08-19

    申请号:US16794525

    申请日:2020-02-19

    摘要: A method for forming a semiconductor structure includes: providing a substrate; forming a stacked structure on the substrate; forming a barrier layer on a sidewall of the stacked structure; forming a first dielectric layer covering the barrier layer and the stacked structure; removing a portion of the first dielectric layer to expose an upper portion of the stacked structure; forming a metal layer covering the stacked structure and the first dielectric layer; performing an annealing process to react the metal layer with the stacked structure to form a metal silicide layer at the upper portion of the stacked structure; removing an unreacted portion of the metal layer; removing a portion of the barrier layer to form a recess above the barrier layer; and forming a second dielectric layer covering the metal silicide layer and the first dielectric layer to form air gaps on both sides of the stacked structure.

    SEMICONDUCTOR STRUCTURE
    2.
    发明公开

    公开(公告)号:US20240297226A1

    公开(公告)日:2024-09-05

    申请号:US18660728

    申请日:2024-05-10

    摘要: A semiconductor structure is provided. The semiconductor structure includes a pad layer, a first conductive layer, a second conductive layer, an interlayer dielectric layer, and a control gate. The pad layer is disposed on a substrate. The first conductive layer is disposed on the pad layer. The second conductive layer is disposed on the first conductive layer. The interlayer dielectric layer is disposed on the first conductive layer and the second conductive layer and is in contact with top surfaces of the first conductive layer and the second conductive layer. The control gate is disposed on the interlayer dielectric layer.

    SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME

    公开(公告)号:US20230335602A1

    公开(公告)日:2023-10-19

    申请号:US17723196

    申请日:2022-04-18

    摘要: A method of forming a semiconductor structure includes forming a mask layer on a substrate. The mask layer and the substrate include an opening. An isolation structure is formed in the opening. The mask layer is removed. A first conductive layer is formed on the isolation structure and the substrate. A first implantation process is performed on the first conductive layer and the isolation structure, to form a doped portion in the first conductive layer and a doped portion in the isolation structure. A second conductive layer is formed on the first conductive layer and the isolation structure. A first planarization process is performed, so that the top surfaces of the second conductive layer, the first conductive layer, and the isolation structure are aligned.