公开(公告)号：US12007439B1

公开(公告)日：2024-06-11

申请号：US18149165

申请日：2023-01-03

申请人： Winbond Electronics Corp.

发明人： Kuo-Min Liao ,  Tien-Yu Liao ,  Chien-Han Liao

IPC分类号： G01R31/3183 ,  G01R31/3193

CPC分类号： G01R31/318371 ,  G01R31/31932 ,  G01R31/31935

摘要： A method and an apparatus for integrated circuit testing are provided. The method includes: operating a tester to perform a qualitative testing on devices in the integrated circuit by following electrical addresses of the devices, and to introduce an original verification pattern during the qualitative testing, such that a verification pattern corresponding to the original verification pattern can be converted from a raw data of a result of the qualitative testing; converting the raw data to a test graph presented by physical addresses, by using pre-determined scramble equations; and identifying portions of the verification pattern appeared in the test graph and comparing the portions of the verification pattern with corresponding portions of the original verification pattern by pattern recognition, and correcting the pre-determined scramble equations according to comparison result.

公开(公告)号：US20240219465A1

公开(公告)日：2024-07-04

申请号：US18149165

申请日：2023-01-03

申请人： Winbond Electronics Corp.

发明人： Kuo-Min Liao ,  Tien-Yu Liao ,  Chien-Han Liao

IPC分类号： G01R31/3183 ,  G01R31/3193

CPC分类号： G01R31/318371 ,  G01R31/31932 ,  G01R31/31935

摘要： A method and an apparatus for integrated circuit testing are provided. The method includes: operating a tester to perform a qualitative testing on devices in the integrated circuit by following electrical addresses of the devices, and to introduce an original verification pattern during the qualitative testing, such that a verification pattern corresponding to the original verification pattern can be converted from a raw data of a result of the qualitative testing; converting the raw data to a test graph presented by physical addresses, by using pre-determined scramble equations; and identifying portions of the verification pattern appeared in the test graph and comparing the portions of the verification pattern with corresponding portions of the original verification pattern by pattern recognition, and correcting the pre-determined scramble equations according to comparison result.