Array substrate and display panel

    公开(公告)号:US10580803B2

    公开(公告)日:2020-03-03

    申请号:US16163586

    申请日:2018-10-18

    Abstract: An array substrate and a display panel are provided. The array substrate includes a non-display area and a display area. The non-display area includes a first non-display area and a second non-display area, and the display area includes a normal display area and a wiring area. The normal display area is surrounded by the first non-display area, the wiring area is surrounded by the normal display area, and the second non-display area is surrounded by the wiring area. The second non-display area comprises an opening area. In the solution, since the number of data lead lines in the same layer in the wiring area is reduced, a line distance between adjacent data lead lines is increased, thereby reducing coupling capacitance between adjacent data lead lines arranged in the same layer.

    Display panel and display device
    2.
    发明授权

    公开(公告)号:US10410601B2

    公开(公告)日:2019-09-10

    申请号:US16147587

    申请日:2018-09-29

    Abstract: A display panel and a display device are provided. The display panel has a pixel region and a frame region surrounding the pixel region. The pixel region includes sub-pixels each including a first transistor and a pixel electrode. The plurality of sub-pixels includes display sub-pixels and dummy sub-pixels. At least part of the dummy sub-pixels are antistatic sub-pixels. A data line is configured to provide a driving signal to the display sub-pixels. A scan line is configured to provide scan signal to the display sub-pixels. A first reference signal line is configured to provide static protection reference signal to the antistatic sub-pixels. The first gate electrode of the first transistor of the antistatic sub-pixel is connected to the first drain electrode and a first reference signal line, and the first source electrode of the first transistor of the antistatic sub-pixel is connected to the data line.

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