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公开(公告)号:US20230347741A1
公开(公告)日:2023-11-02
申请号:US18346896
申请日:2023-07-05
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Hao Wu , Zhuo Deng , Poping Shen
CPC classification number: B60K37/02 , G09G3/2092 , B60K2370/688 , B60K2370/152 , B60K2370/52 , B60K2370/31 , G09G2300/0413 , G09G2310/0213 , G09G2380/10 , G09G2360/04
Abstract: Display panel and display device are provided. Display panel has display area and bezel area and includes first and second panel edges connected and adjacent to each other and extending linearly in different directions, first functional circuit located in the bezel area and including first functional circuit units. First functional circuit units include first, second, and third circuit units. First circuit units are located at side of first panel edge and arranged linearly along first panel edge, second circuit units are located at side of second panel edge and arranged linearly along second panel edge, third circuit unit is located between first and second circuit units and close to position where first panel edge is connected to second panel edge. One third circuit unit is arranged in direction inclined to a direction in which one first circuit unit is arranged and direction in which one second circuit unit is arranged.
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公开(公告)号:US11783793B1
公开(公告)日:2023-10-10
申请号:US18049760
申请日:2022-10-26
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yiqiang Lin , Hao Wu , Poping Shen
IPC: G09G3/36
CPC classification number: G09G3/3659 , G09G3/3614 , G09G2300/0426 , G09G2300/0819 , G09G2310/0202 , G09G2310/06 , G09G2310/08 , G09G2320/0247
Abstract: A display panel includes data lines and scanning lines in a display region, and a demultiplexer in a non-display region. The demultiplexer includes m branches. m is an integer. m≥2. Each branch includes a switching transistor which includes a first electrode coupled with an input terminal of the demultiplexer, a second electrode coupled with one of the data lines, and a control electrode for receiving a switching control signal. The demultiplexer includes a first demultiplexer including a compensation transistor, of which first and second electrodes are short-circuited. The compensation transistor is coupled with the data line and has a control electrode for receiving a compensation control signal. The compensation control signal received by the compensation transistor in the branch has one functional rising edge in a period during which the scanning line provides an effective level signal once.
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公开(公告)号:US20210225951A1
公开(公告)日:2021-07-22
申请号:US17223022
申请日:2021-04-06
Applicant: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Hao Wu
IPC: H01L27/32 , G09G3/3275 , G09G3/3266 , G06F1/16
Abstract: Disclosed are an array substrate and a display device. In some embodiments of the disclosure, at least one multi-access selector arranged proximate to a first non-right-angled edge is segmented into a plurality of sub-units, and orthographic projections of at least two of the sub-units are stagger in a Y direction, the Y direction is perpendicular to a X direction in which gate lines extend.
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公开(公告)号:US10209587B2
公开(公告)日:2019-02-19
申请号:US15702819
申请日:2017-09-13
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Hao Wu
IPC: G02F1/136 , G02F1/1362 , G02F1/1333 , G02F1/137 , G06F3/041 , G06F3/044 , G02F1/1368 , G02F1/1343
Abstract: The present disclosure provides an array substrate, including: a base substrate, a plurality of scan lines; a plurality of data lines arranged by intersecting with the plurality of scan lines; a plurality of thin film transistors arranged in a matrix, each thin film transistor includes a gate electrode, an active layer and a drain electrode; a planarization layer covering the gate electrode, the active layer and the drain electrode, a position of the planarization layer corresponding to the drain electrode is provided with a through hole penetrating through the planarization layer, and the drain electrode is located in the through hole; a filling electrode, located in the through hole and connected with the drain electrode and covers the drain electrode; and a pixel electrode, indirectly connected with the drain electrode through the filling electrode.
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公开(公告)号:US11823625B2
公开(公告)日:2023-11-21
申请号:US17417759
申请日:2020-06-24
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Hao Wu , Hao Wu , Poping Shen
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2310/0286 , G09G2310/08
Abstract: A shift register includes n shift register units which are cascaded. Each shift register unit includes a shift module and multiple enable modules. The shift module of an i-th-level shift register unit is configured to receive and latch a shift signal output by the shift module in an (i−1)-th-level shift register unit. The multiple enable modules of the i-th-level shift register unit are electrically connected to the shift module of the i-th-level shift register unit, and each of the multiple enable modules is configured to generate a gate driving signal according to the shift signal. n and i are positive integers, 1≤i≤n.
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公开(公告)号:US20200066806A1
公开(公告)日:2020-02-27
申请号:US16667926
申请日:2019-10-30
Applicant: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Hao Wu
IPC: H01L27/32 , G06F1/16 , G09G3/3266 , G09G3/3275
Abstract: Disclosed are an array substrate and a display device. In some embodiments of the disclosure, at least one multi-access selector arranged proximate to a first non-right-angled edge is segmented into a plurality of sub-units, and the sub-units are arranged in an extension direction of the first non-right-angled edge.
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公开(公告)号:US12257902B2
公开(公告)日:2025-03-25
申请号:US18346896
申请日:2023-07-05
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Hao Wu , Zhuo Deng , Poping Shen
Abstract: Display panel and display device are provided. Display panel has display area and bezel area and includes first and second panel edges connected and adjacent to each other and extending linearly in different directions, first functional circuit located in the bezel area and including first functional circuit units. First functional circuit units include first, second, and third circuit units. First circuit units are located at side of first panel edge and arranged linearly along first panel edge, second circuit units are located at side of second panel edge and arranged linearly along second panel edge, third circuit unit is located between first and second circuit units and close to position where first panel edge is connected to second panel edge. One third circuit unit is arranged in direction inclined to a direction in which one first circuit unit is arranged and direction in which one second circuit unit is arranged.
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公开(公告)号:US11437452B2
公开(公告)日:2022-09-06
申请号:US17223022
申请日:2021-04-06
Applicant: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Hao Wu
IPC: H01L27/32 , G09G3/3275 , G09G3/3266 , G06F1/16
Abstract: Disclosed are an array substrate and a display device. In some embodiments of the disclosure, at least one multi-access selector arranged proximate to a first non-right-angled edge is segmented into a plurality of sub-units, and orthographic projections of at least two of the sub-units are stagger in a Y direction, the Y direction is perpendicular to a X direction in which gate lines extend.
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公开(公告)号:US10991780B2
公开(公告)日:2021-04-27
申请号:US16667926
申请日:2019-10-30
Applicant: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Hao Wu
IPC: H01L27/32 , G09G3/3275 , G09G3/3266 , G06F1/16
Abstract: Disclosed are an array substrate and a display device. In some embodiments of the disclosure, at least one multi-access selector arranged proximate to a first non-right-angled edge is segmented into a plurality of sub-units, and the sub-units are arranged in an extension direction of the first non-right-angled edge.
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公开(公告)号:US10725344B1
公开(公告)日:2020-07-28
申请号:US16592652
申请日:2019-10-03
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd
Inventor: Hao Wu
IPC: G02F1/1339 , G02F1/1333 , G02F1/1343 , G06F3/044
Abstract: Provided is a display panel including a first substrate and a second substrate that are opposite to the first substrate and a sealant arranged in the non-display area. The first substrate includes a base substrate, first fanout wires and a planarization layer that are arranged at a side of the base substrate proximate to the second substrate. The first fanout wires are arranged in the non-display area and at a side of the planarization layer facing away from the base substrate. Each first fanout wire includes first to third wires that are connected in sequence. A distance between adjacent second wires is greater than a distance between adjacent first wires, and is greater than a distance between adjacent third wires. The planarization layer is provided with a first opening, and the first opening overlaps with the sealant and a second wire area formed by second wires.
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