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公开(公告)号:US12284830B2
公开(公告)日:2025-04-22
申请号:US18384584
申请日:2023-10-27
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Qingjun Lai , Yihua Zhu , Yong Yuan , Ping An , Zhaokeng Cao
IPC: G09G3/3225 , H10D86/40 , H10D86/60 , H10K59/121
Abstract: A display panel includes a base substrate, a first transistor and a second transistor. The first transistor and the second transistor are formed on the base substrate. The first transistor includes a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The first active layer includes silicon. The second transistor includes a second active layer, a second gate electrode, a second source electrode, and a second drain electrode. The second active layer includes an oxide semiconductor. A length of a channel region of the first transistor is L1. Along a direction perpendicular to the base substrate, a distance between the first gate electrode and the first active layer is D1. The first transistor further includes a third gate electrode. Along the direction perpendicular to the base substrate, a distance between the third gate electrode and the first active layer is D3, and D1
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公开(公告)号:US12198626B2
公开(公告)日:2025-01-14
申请号:US18168976
申请日:2023-02-14
Inventor: Yong Yuan , Nana Xiong , Jujian Fu
IPC: G09G3/3233
Abstract: A display panel and a display device are provided. The display panel includes pixel circuits. Each pixel circuit includes a driving transistor, a data writing circuit, a light-emitting control circuit, a threshold compensation circuit and a bias adjustment circuit. The driving transistor includes a gate electrically connected to a first node, a first terminal electrically connected to a second node, and a second terminal electrically connected to the third node, and is configured to generate a driving current. The third node is connected to a light-emitting element through the light-emitting control circuit. The bias adjustment circuit is configured to provide a signal of a bias adjustment signal terminal to the second node under control of a signal of a first scanning signal terminal in such a manner that a bias state of the driving transistor is adjusted.
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公开(公告)号:US12170292B2
公开(公告)日:2024-12-17
申请号:US17517455
申请日:2021-11-02
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Guofeng Zhang , Yong Yuan
IPC: H01L27/12
Abstract: Provided are a display panel and a display device. The display panel includes a base substrate; a first transistor including a first active layer including silicon, a first gate, a first source and a first drain; a second transistor including a second active layer including an oxide semiconductor, a second gate located on a side of the second active layer facing away from the base substrate, a second source and a second drain; a first insulating layer including an inorganic material; and a planarization layer including an organic material. The first insulating layer includes a first insulating sublayer and a second insulating sublayer. The second insulating sublayer is located on a side of the first insulating sublayer facing away from the base substrate, and a compactness of the second insulating sublayer is greater than a compactness of the first insulating sublayer.
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公开(公告)号:US12106696B2
公开(公告)日:2024-10-01
申请号:US18344897
申请日:2023-06-30
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Qingjun Lai , Yihua Zhu , Yong Yuan
IPC: G09G3/20 , G09G3/3266 , G09G3/36 , G11C19/28
CPC classification number: G09G3/2092 , G09G3/20 , G09G3/3266 , G09G3/3674 , G09G2310/0286 , G09G2310/08 , G11C19/28
Abstract: Provided are a display panel and a display device. The display panel includes a driver circuit including N stages of cascaded shift registers, where N≥2. A shift register includes a first control part and a second control part. The second control part includes a first control unit and a second control unit. The first control unit comprises a first gating unit. One terminal of the first gating unit is connected to a preset node, another terminal of the first gating unit is connected to a fourth node, and a control terminal of the first gating unit is configured to receive a fifth voltage signal. The second control unit is configured to receive at least a third voltage signal and a signal of the fourth node or receive at least a fourth voltage signal and a signal of a fifth node and generate an output signal.
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公开(公告)号:US11908391B2
公开(公告)日:2024-02-20
申请号:US17994617
申请日:2022-11-28
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/043 , G09G2300/0819 , G09G2320/0233 , G09G2320/045
Abstract: Provided are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write module, a drive module, a compensation module and a reset module. The drive module includes a drive transistor. The data write module is connected between a data signal input terminal and a source of the drive transistor. The compensation module is connected between a gate of the drive transistor and the drain of the drive transistor. The rest module is connected between a reset signal terminal and the drain of the drive transistor. The reset module also serves as a bias module. An operation of the pixel circuit includes a reset stage and a bias stage, during the reset stage, the reset module and the compensation module are on.
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公开(公告)号:US11663962B2
公开(公告)日:2023-05-30
申请号:US17824091
申请日:2022-05-25
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan , Jieliang Li
IPC: G09G3/32 , G09G3/3233
CPC classification number: G09G3/32 , G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2320/0233 , G09G2320/045
Abstract: Provided are a display panel, a driving method thereof, and a display device. The display panel includes a pixel circuit and a light-emitting element; where the pixel circuit includes a drive module, a data writing module, a light emission control module, and a bias module; where the drive module is configured to provide the light-emitting element with a drive current and includes a drive transistor; the data writing module is connected to a source of the drive transistor and configured to selectively provide the drive module with a data signal; the light emission control module is configured to selectively allow the light-emitting element to enter a light-emitting stage; the bias module is connected between a drain of the drive transistor and the light emission control signal line.
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公开(公告)号:US11637163B2
公开(公告)日:2023-04-25
申请号:US17184599
申请日:2021-02-25
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
Abstract: Provided are an array substrate and a manufacturing method of an array substrate and a display panel and device. The array substrate includes a pixel circuit. The pixel circuit includes a first transistor and a second transistor, the first transistor includes a first active layer, the second transistor includes a second active layer, and the first active layer and the second active layer both include silicon. The array substrate further includes a first-type inorganic layer and a second-type inorganic layer and a first via hole. The first via hole is located above the first active layer and at least penetrates through the second-type inorganic layer. Concentration of hydrogen ions in the first active layer is less than concentration of hydrogen ions in the second active layer.
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公开(公告)号:US11545508B2
公开(公告)日:2023-01-03
申请号:US16447044
申请日:2019-06-20
Applicant: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.
Inventor: Yong Yuan , Heeyol Lee
Abstract: A display panel includes a first flexible substrate, and a metal wiring layer located on the first flexible substrate. The metal wiring layer includes at least one first power-supply line. At least one binding region is disposed on the side of the first flexible substrate away from the metal wiring layer. The display panel also includes a thin-film transistor layer, located on the side of the metal wiring layer away from the first flexible substrate and including a plurality of first thin-film transistors. Each first thin-film transistor includes a first electrode electrically connected to the first power-supply line. The display panel further includes a first conductive layer, including a plurality of conductive sections. The plurality of conductive sections is located in the binding region, and the first power-supply line is electrically connected to at least one conductive section of the plurality of conductive sections.
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公开(公告)号:US11538402B2
公开(公告)日:2022-12-27
申请号:US17409339
申请日:2021-08-23
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan , Jieliang Li
IPC: G09G3/32
Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving module, a data-writing module, and a light-emitting controller. The driving module is configured to provide a driving current for the light-emitting element, and the driving module includes a driving transistor. The data-writing module is configured to selectively provide a data signal for the driving transistor. The light-emitting controller is configured to selectively allow the light-emitting element to enter a light-emitting stage. One end of the light-emitting controller is connected to a first power signal terminal for receiving a first power signal. The pixel circuit further includes a latch module and a first scanning signal line. The first scanning signal line is configured to receive a first scanning signal. The latch module is connected between a gate of the driving transistor and the first scanning signal line.
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公开(公告)号:US20220059001A1
公开(公告)日:2022-02-24
申请号:US17520520
申请日:2021-11-05
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
Abstract: Provided are a display panel and display device. The display panel includes a driver circuit, where the driver circuit includes an N-stage cascaded shift register which includes a first control unit, a second control unit, a third control unit, and a fourth control unit. The first control unit is configured to receive an input signal and control a signal of a first node in response to a first clock signal. The second control unit is configured to control a signal of a second node. The third control unit is configured to receive the first voltage signal and generate an output signal in response to a signal of a third node, or receive the second voltage signal and generate an output signal in response to the signal of the second node. The fourth control unit is connected to the third node.
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