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公开(公告)号:USRE50370E1
公开(公告)日:2025-04-08
申请号:US17880487
申请日:2022-08-24
Applicant: XILINX, INC.
Inventor: Alireza Kaviani , Pongstorn Maidee , Ivo Bolsens
IPC: G06F13/36 , G06F13/00 , G06F13/362 , G06F13/40
Abstract: An example integrated circuit (IC) system includes a package substrate having a programmable integrated circuit (IC) and a companion IC mounted thereon, the programmable IC including a programmable fabric and the companion IC including application circuitry. The IC system further includes a system-in-package (SiP) bridge including a first SiP IO circuit disposed in the programmable IC, a second SiP IO circuit disposed in the companion IC, and conductive interconnect on the package substrate electrically coupling the first SiP IO circuit and the second SiP IO circuit. The IC System further includes first aggregation and first dispersal circuits in the programmable IC coupled between the programmable fabric and the first SiP IO circuit. The IC system further includes second aggregation and second dispersal circuits in the companion IC coupled between the application circuitry and the second SiP IO circuit.
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公开(公告)号:US11803681B1
公开(公告)日:2023-10-31
申请号:US17209006
申请日:2021-03-22
Applicant: XILINX, INC.
Inventor: Zachary Blair , Alireza Kaviani
IPC: G06F30/323 , H01L25/065 , H01L27/02 , G06F30/3947
CPC classification number: G06F30/323 , G06F30/3947 , H01L25/0655 , H01L27/0207
Abstract: The embodiments herein rely on cross reticle wires (also referred to as cross die wires) to provide communication channels between programmable dies already formed on a wafer. Using cross reticle wires to facilitate x-die communication can be three to four orders of magnitude faster than using general purpose I/O. With a wafer containing cross reticle wires, various device geometries can be generated at dicing time by cutting across different reticle boundaries. This allows up to full wafer-size devices, or several smaller sub-wafer devices to be derived from one wafer. Although the programmable dies can contain defects, these defects can be identified and avoided when generating a bitstream for configuring programmable features in the programmable dies.
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