公开(公告)号：US11177795B1

公开(公告)日：2021-11-16

申请号：US16855962

申请日：2020-04-22

Applicant: XILINX, INC.

Inventor： Jun Liu ,  Bruce Young

IPC: H03K3/037

Abstract: A master latch includes a latch input node and a latch output node, a first inverter with an input and an output, the input coupled to the latch input node and the output coupled to the latch output node, and a second inverter with an input and an output, the input coupled to the latch output node and the output coupled to the latch input node. The master latch further includes a first pull-up device connected between a source voltage and the latch input node, the first pull-up device configured to pull the latch input node up towards the source voltage when the latch output node is low, and a first pull-down device connected between the latch input node and a ground voltage, the first pull-down device configured to pull the latch input node towards the ground voltage when the latch output node is high.