公开(公告)号：US11201095B1

公开(公告)日：2021-12-14

申请号：US16549801

申请日：2019-08-23

Applicant: XILINX, INC.

Inventor： Ronilo Boja ,  Inderjit Singh ,  Gerilyn Maloney ,  Chandan Bhat

IPC: H01L23/049 ,  H01L23/24 ,  H01L23/31 ,  H01L21/56

Abstract: A chip package and method for fabricating the same are provided which utilize a cover having one or more windows formed through one or more sidewalls to provide excellent resistance to warpage while allowing access to an internal volume of the chip package. In one example, the chip package includes a package substrate, an integrated circuit (IC) die, and a cover disposed over the IC die. The cover includes a lower surface facing the IC die, an upper surface facing away from the IC die, a lip extending from the lower surface, and a first sidewall extending from a first edge of the upper surface to the bottom of the lip. The lip is secured to the package substrate and encloses a volume between the lower surface and the package substrate. The IC die resides in the volume. A first elongated window is formed through the first sidewall and exposes the volume through the cover.