公开(公告)号：US11107696B1

公开(公告)日：2021-08-31

申请号：US16667176

申请日：2019-10-29

Applicant: XILINX, INC.

Inventor： Li-Wen Chang ,  Ping-Chin Yeh

IPC: H01L21/336 ,  H01L21/02 ,  H01L21/3115 ,  H01L21/265 ,  H01L21/311 ,  H01L21/768

Abstract: Examples described herein provide for methods for semiconductor processing for forming source/drain regions of transistors. An example is a method for semiconductor processing. An etch stop liner is formed in a semiconductor substrate. Forming the etch stop liner includes implanting etch selectivity dopants into the semiconductor substrate. The etch selectivity dopants form at least part of the etch stop liner. A source/drain cavity is formed in the semiconductor substrate. Forming the source/drain cavity includes etching the etch stop liner. Etching the etch stop liner selectively etches the etch stop liner relative to a material of the semiconductor substrate. A source/drain region is epitaxially grown in the source/drain cavity.