公开(公告)号：US11348624B1

公开(公告)日：2022-05-31

申请号：US17210356

申请日：2021-03-23

Applicant: XILINX, INC.

Inventor： Richard Lewis Walke ,  John Edward Mcgrath

IPC: G11C7/10 ,  G11C8/16

Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.

公开(公告)号：US11721373B2

公开(公告)日：2023-08-08

申请号：US17750297

申请日：2022-05-20

Applicant: XILINX, INC.

Inventor： Richard Lewis Walke ,  John Edward Mcgrath

IPC: G11C7/10 ,  G11C8/16

CPC classification number: G11C7/1075 ,  G11C7/1012 ,  G11C7/1051 ,  G11C7/1072 ,  G11C7/1078 ,  G11C8/16

Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.