公开(公告)号：US20240396550A1

公开(公告)日：2024-11-28

申请号：US18200432

申请日：2023-05-22

Applicant: XILINX, INC.

Inventor： Wenyi SONG ,  Shadi BARAKAT

IPC: H03K19/003 ,  G11C11/408 ,  H03K3/037 ,  H03K19/0185

Abstract: Driver circuitry for memory controller circuitry includes level shifter circuitry, inverter circuitry, and output circuitry. The level shifter circuitry receives an input data signal and outputs a first level shifted data signal and a second level shifted data signal based on the input data signal. The inverter circuitry is connected to the level shifter circuitry, receives the first level shifted data signal and the second level shifted data signal, and outputs a first inverted data signal via a first output node and a second inverted data signal via a second output node. The inverter circuitry includes mitigation circuitry coupled to the first output node and the second output node and alters one or more of the first inverted data signal and the second inverted data signal. The output circuitry outputs an output data signal based on the first inverted data signal and the second inverted data signal.