CALIBRATED LINEAR DUTY CYCLE CORRECTION

    公开(公告)号:US20230086781A1

    公开(公告)日:2023-03-23

    申请号:US17482336

    申请日:2021-09-22

    Applicant: XILINX, INC.

    Abstract: Examples describe a duty cycle correction circuit for correcting duty cycle distortion from memory. One example is an integrated circuit for correcting an input clock signal. The integrated circuit includes a first leg circuit and a second leg circuit. The first leg circuit and the second leg circuit both comprise a charging circuit and a discharging circuit. Each charging circuit comprises a first plurality of transistors and each discharging circuit comprises a second plurality of transistors. The charging circuit is coupled to the discharging circuit in series. A number of transistors of the first plurality of transistors in the first leg circuit is different from a number of transistors of the first plurality of transistors in the second leg circuit.

    PROCESS AND TEMPERATURE TRACKING ON-CHIP SUPPLY REGULATION FOR LOW JITTER APPLICATIONS

    公开(公告)号:US20240411331A1

    公开(公告)日:2024-12-12

    申请号:US18207497

    申请日:2023-06-08

    Applicant: XILINX, INC.

    Abstract: On chip integrated circuit supply voltage regulator has a reference voltage that varies, based on process and temperature conditions of the integrated circuit. Supply voltage is boosted up if the active transistor load devices operate in a Slow-Slow process condition and/or temperature rises. Higher supply voltage improves the system performance (jitter/delay) if the load network includes switching components. If the active transistor load devices operate in a Fast-Fast process condition then the supply voltage is reduced without loss of performance and a savings in power. The variable reference voltage is generated based on process and temperature conditions of the semiconductor integrated circuit devices (transistors). The voltage regulator will automatically have its variable reference voltage adjusted based upon the process condition fabrication and temperature of the areas of the integrated circuit where the active transistor load devices are located.

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