公开(公告)号：US11163605B1

公开(公告)日：2021-11-02

申请号：US16571776

申请日：2019-09-16

Applicant: XILINX, INC.

Inventor： Sonal Santan ,  Min Ma ,  Soren Soe ,  Cheng Zhen ,  Lizhi Hou ,  Yu Liu

IPC: G06F9/46 ,  G06F9/48

Abstract: Examples herein describe techniques for launching and executing a pipeline formed by heterogeneous processing units. A system on a chip (SoC) can include different hardware elements which form a collection of heterogeneous processing units, such as general purpose processor, programmable logic array, and specialized processors. These processing units are heterogeneous meaning their underlying hardware and techniques for processing data are different, in contrast to a system that using homogeneous processing units. In the embodiments herein, the heterogeneous processing units can be arranged into a pipeline where each stage of the pipeline is performed by one of the processing units.