公开(公告)号：US10949498B1

公开(公告)日：2021-03-16

申请号：US16352764

申请日：2019-03-13

Applicant: Xilinx, Inc.

Inventor： Vijay Kumar Reddy Enumula ,  Sundeep Ram Gopal Agarwal

IPC: G06F17/16 ,  G06F7/556 ,  G06N3/04

Abstract: Disclosed approaches for circuitry that implements a softmax function include difference calculation circuitry configured to calculate differences between combinations of elements, zk−zj, of a vector. First lookup circuitry is configured to lookup and output representations of exponential values, ezk−zj associated with the differences in response to input of the differences. Each adder circuit of N adder circuits sums a subset of the exponential values output from the first lookup circuitry and a value of 1. The sum output by each adder circuit denotes a denominator of a plurality of denominators of the softmax function. Second lookup circuitry is configured with quotients and looks-up and outputs quotients associated with the plurality of denominators as results of the softmax function.

公开(公告)号：US11663490B1

公开(公告)日：2023-05-30

申请号：US16600254

申请日：2019-10-11

Applicant: XILINX, INC.

Inventor： Vijay Kumar Reddy Enumula ,  Sundeep Ram Gopal Agarwal

IPC: G06N3/10 ,  G06N3/08 ,  G06F7/544

CPC classification number: G06N3/10 ,  G06F7/5443 ,  G06N3/08

Abstract: An example method of implementing a quantized neural network (QNN) for a programmable device includes: identifying multiply-accumulate operations of neurons in the QNN; converting the multiply-accumulate operations to memory lookup operations; and implementing the memory lookup operations using a pre-compute circuit for the programmable device, the pre-compute circuit storing a pre-computed output of a neuron in the QNN for each of the memory lookup operations.