公开(公告)号：US07225098B2

公开(公告)日：2007-05-29

申请号：US10535064

申请日：2002-11-21

Applicant: Xavier Robert

Inventor： Xavier Robert

IPC: G06F9/44

CPC classification number: G06F11/3656

Abstract: The invention concerns a monitoring device (18) integrated to a microprocessor chip (12) executing a series of instructions comprising: device (26) for producing simultaneously several types of monitoring messages of the microprocessor, a buffer (28) divided into several blocks (A, B, C, D, E) each of which is designed to store only messages of one of the types capable of being produced simultaneously, the size of each block depending on the maximum frequency at which the messages can be stored, and device (26) for, each time one or more messages are simultaneously stored in the blocks (A, B, C, D, E) of the buffer (28), storing in a predetermined block (F) of the buffer a coded value representing said block(s) of the buffer.

Abstract translation: 本发明涉及集成到执行一系列指令的微处理器芯片（12）的监视设备（18），包括：用于同时产生微处理器的几种类型的监视消息的设备（26），被分成几个块的缓冲器（28） A，B，C，D，E），其每一个被设计为仅存储能够同时产生的类型之一的消息，每个块的大小取决于可以存储消息的最大频率，以及设备 （26），每当将一个或多个消息同时存储在缓冲器（28）的块（A，B，C，D，E）中时，在缓冲器的预定块（F）中存储代表 所述块的缓冲区。

公开(公告)号：US20070220331A1

公开(公告)日：2007-09-20

申请号：US11671661

申请日：2007-02-06

Applicant: Renaud Ayrignac ,  Xavier Robert

Inventor： Renaud Ayrignac ,  Xavier Robert

IPC: G06F11/00

CPC classification number: G06F11/3656

Abstract: The systems and methods disclosed relate to a processor comprising a processing unit and a debugging interface which can be connected to an external emulator for debugging a program executed by the processor, the debugging interface comprising internal resources at least partially accessible to the external emulator. According to one embodiment, the debugging interface comprises a selecting circuit for selecting an internal resource of the debugging interface, according to a reference supplied by the processing unit, and access means for transferring a datum between the resource selected and a data field accessible by the processing unit.

Abstract translation: 所公开的系统和方法涉及包括处理单元和调试接口的处理器，该接口可连接到外部仿真器，用于调试由处理器执行的程序，该调试接口包括外部仿真器至少部分可访问的内部资源。 根据一个实施例，调试接口包括选择电路，用于根据由处理单元提供的参考来选择调试接口的内部资源;以及访问装置，用于在所选择的资源和可访问的数据字段之间传送数据; 处理单元。

公开(公告)号：US5729487A

公开(公告)日：1998-03-17

申请号：US569819

申请日：1995-12-08

Applicant: Frederic Dufal ,  Xavier Robert

Inventor： Frederic Dufal ,  Xavier Robert

IPC: G06F7/496 ,  G06F7/52 ,  G06F7/535

CPC classification number: G06F7/535 ,  G06F2207/5353 ,  G06F7/49921 ,  G06F7/49947

Abstract: The component essentially includes three subtracter operators (ST1-ST3) connected between two multiplexers (MUX1, MUX2), associated with a shifter (DEC) for shifting the dividend and a concatenator means (MCT) for delivering the successive partial dividends from the contents of an output flip-flop (B3) and from the successive shifted words (S). The final-result word is stored in a shift register (RG). The component may be applied to image processing.

Abstract translation: 该组件基本上包括连接在与用于移除分红的移位器（DEC）相关联的两个多路复用器（MUX1，MUX2）之间的三个减法器操作符（ST1-ST3），以及用于从连续部分红利 输出触发器（B3）和连续移位的字（S）。 最终结果字存储在移位寄存器（RG）中。 该组件可以应用于图像处理。

公开(公告)号：US07689864B2

公开(公告)日：2010-03-30

申请号：US11671661

申请日：2007-02-06

Applicant: Renaud Ayrignac ,  Xavier Robert

Inventor： Renaud Ayrignac ,  Xavier Robert

IPC: G06F11/00

CPC classification number: G06F11/3656

Abstract: The systems and methods disclosed relate to a processor comprising a processing unit and a debugging that which can be connected to an external emulator for debugging a program executed by the processor, the debugging interface including internal resources at least partially accessible to the external emulator. According to one embodiment, the debugging interface includes a selecting circuit for selecting an internal resource of the debugging interface, according to a reference supplied by the processing unit, and an access circuit that transfers a datum between the resource selected and a data field accessible by the processing unit.

Abstract translation: 所公开的系统和方法涉及包括处理单元和调试器的处理器，该调试器可以连接到外部仿真器，用于调试由处理器执行的程序，该调试接口包括外部仿真器至少部分可访问的内部资源。 根据一个实施例，调试接口包括一个选择电路，用于根据由处理单元提供的参考来选择调试接口的内部资源;以及访问电路，用于在所选择的资源和可由 处理单元。

公开(公告)号：US20060155971A1

公开(公告)日：2006-07-13

申请号：US10535065

申请日：2002-11-14

Applicant: Catherine Robert ,  Xavier Robert ,  Jehan-Philippe Barbiero

Inventor： Catherine Robert ,  Xavier Robert ,  Jehan-Philippe Barbiero

IPC: G06F9/44

CPC classification number: G06F11/348 ,  G06F11/28

Abstract: The invention relates to a method for the transmission of digital messages by a monitoring circuit (18) which is integrated into a microprocessor (12), said method being performed during the execution of a series of instructions by the microprocessor. Moreover, at least one of said digital messages represents the detection of a jump in the execution of the series of instructions from a source instruction to a destination instruction. The inventive method consists in determining whether or not the jump is associated with a jump instruction from the series of instructions for which the address of the jump destination instruction is explicitly indicated in the instruction. If the answer is in the affirmative, a first value is allocated to a first set of bits or, if the answer is in the negative, a second value is allocated to the first set of bits. Finally, if the first set of bits has been allocated the second value, a third value is allocated to a second set of bits of the digital message, said third value identifying the jump among several types of jumps.

Abstract translation: 本发明涉及一种通过集成到微处理器（12）中的监控电路（18）传输数字消息的方法，所述方法在微处理器执行一系列指令期间执行。 此外，所述数字消息中的至少一个表示检测从源指令到目的地指令的一系列指令的执行中的跳转。 本发明的方法在于确定跳转是否与来自在指令中明确指示跳转目的地指令的地址的一系列指令中的跳转指令相关联。 如果答案是肯定的，则将第一值分配给第一组位，或者如果答案是否定的，则将第二值分配给第一组位。 最后，如果第一组位被分配了第二值，则将第三值分配给数字消息的第二组位，所述第三值标识了几种类型跳转中的跳转。

公开(公告)号：US07673121B2

公开(公告)日：2010-03-02

申请号：US10535063

申请日：2002-11-14

Applicant: Catherine Robert ,  Xavier Robert ,  Jehan-Philippe Barbiero

Inventor： Catherine Robert ,  Xavier Robert ,  Jehan-Philippe Barbiero

IPC: G06F7/38 ,  G06F9/00 ,  G06F9/44

CPC classification number: G06F11/2236 ,  G06F11/28 ,  G06F11/3024 ,  G06F11/3065

Abstract: A method for the transmission of digital messages by the output terminals of a monitoring circuit which is integrated into a microprocessor, the digital messages being representative of first specific events which are dependent on the execution of a series of instructions by the microprocessor. The method includes transmitting the following signals to the monitoring circuit by dedicated access points, namely (i) a request signal for the sending of a message that is associated with a specific event from second specific events which are independent of the execution of the series of instructions by the microprocessor and (ii) a signal comprising characteristic data which are associated with the aforementioned specific event; forcing the monitoring circuit to read the request message and, if the resource management conditions are fulfilled, sending an acknowledgement message and storing said characteristic data signal and transmitting a digital message which is representative of the stored characteristic data signal.

Abstract translation: 一种用于通过集成到微处理器中的监视电路的输出端传输数字消息的方法，数字消息代表依赖微处理器执行一系列指令的第一特定事件。 该方法包括：通过专用接入点向监控电路发送以下信号，即（i）用于发送与第二特定事件相关联的消息的请求信号，该消息独立于一系列 微处理器的指令和（ii）包括与上述特定事件相关联的特征数据的信号; 迫使监视电路读取请求消息，如果满足资源管理条件，则发送确认消息并存储所述特征数据信号并发送表示所存储的特征数据信号的数字消息。

公开(公告)号：US20060212684A1

公开(公告)日：2006-09-21

申请号：US10535063

申请日：2002-11-14

Applicant: Catherine Robert ,  Xavier Robert ,  Jehan-Philippe Barbiero

Inventor： Catherine Robert ,  Xavier Robert ,  Jehan-Philippe Barbiero

IPC: G06F9/44

CPC classification number: G06F11/2236 ,  G06F11/28 ,  G06F11/3024 ,  G06F11/3065

Abstract: The invention relates to a method for the transmission of digital messages by means of the output terminals (22) of a monitoring circuit (18) which is integrated into a microprocessor (12), said digital messages being representative of first specific events which are dependent on the execution of a series of instructions by the microprocessor. The inventive method consists in: transmitting the following signals to the monitoring circuit by means of dedicated access points, namely (i) a request signal for the sending of a message that is associated with a specific event from second specific events which are independent of the execution of the series of instructions by the microprocessor and (ii) a signal comprising characteristic data which are associated with the aforementioned specific event; forcing the monitoring circuit to read the request message and, if the resource management conditions are fulfilled, sending an acknowledgement message and storing said characteristic data signal; and transmitting a digital message which is representative of the stored characteristic data signal

Abstract translation: 本发明涉及一种用于通过集成到微处理器（12）中的监视电路（18）的输出端（22）传输数字消息的方法，所述数字消息代表依赖的第一特定事件 在微处理器执行一系列指令时。 本发明的方法在于：通过专用接入点将以下信号发送到监控电路，即（i）用于发送与第二特定事件相关联的消息的请求信号，该消息独立于第二特定事件 由微处理器执行一系列指令，以及（ii）包括与上述特定事件相关联的特征数据的信号; 强制监视电路读取请求消息，如果满足资源管理条件，则发送确认消息并存储所述特征数据信号; 以及发送表示所存储的特征数据信号的数字消息

公开(公告)号：US20060195682A1

公开(公告)日：2006-08-31

申请号：US10535064

申请日：2002-11-21

Applicant: Xavier Robert

Inventor： Xavier Robert

IPC: G06F9/44

CPC classification number: G06F11/3656

Abstract: The invention concerns a monitoring device (18) integrated to a microprocessor chip (12) executing a series of instructions comprising: means (26) for producing simultaneously several types of monitoring messages of the microprocessor, a buffer (28) divided into several blocks (A, B, C, D, E) each of which is designed to store only messages of one of the types capable of being produced simultaneously, the size of each block depending on the maximum frequency at which the messages can be stored, and means (26) for, each time one or more messages are simultaneously stored in the blocks (A, B, C D, E) of the buffer (28), storing in a predetermined block (F) of the buffer a coded value representing said block(s) of the buffer

Abstract translation: 本发明涉及集成到执行一系列指令的微处理器芯片（12）的监视设备（18），其包括：用于同时产生微处理器的几种类型的监视消息的装置（26），分成几个块的缓冲器（28） A，B，C，D，E），其每一个被设计为仅存储能够同时产生的类型之一的消息，每个块的大小取决于可以存储消息的最大频率， （26），每当将一个或多个消息同时存储在缓冲器（28）的块（A，B，CD，E）中时，在缓冲器的预定块（F）中存储表示所述块的编码值 （s）的缓冲区