公开(公告)号：US11106616B1

公开(公告)日：2021-08-31

申请号：US16690212

申请日：2019-11-21

Applicant: XILINX, INC.

Inventor： Chunhua Wu

IPC: G06F13/42

Abstract: Examples described herein generally relate to a Peripheral Connect Interconnect Express (PCIe) device. An example is a non-transitory memory storing a representation of a design that is to be implemented on a programmable integrated circuit. The design includes a classifier module (CM), a message trap engine module (MTEM), and a configuration space. The CM is capable of receiving a PCIe message and is configured to determine whether the PCIe message is a PCIe Type 1 configuration transaction. The CM is configured to forward the PCIe message to an endpoint device and to the MTEM when the PCIe message is a non-PCIe Type 1 configuration transaction and the PCIe Type 1 configuration transaction, respectively. The MTEM is configured to virtualize a downstream port(s) of a virtual switch and maintain the configuration space. The MTEM is capable of accessing the configuration space in response to the PCIe message.

公开(公告)号：US11456951B1

公开(公告)日：2022-09-27

申请号：US17225737

申请日：2021-04-08

Applicant: Xilinx, Inc.

Inventor： Chunhua Wu

IPC: G06F15/173 ,  H04L45/00 ,  H04L45/42 ,  H04L45/02

Abstract: Modifying a flow table for a network accelerator can include, in response to determining that a flow table of a network accelerator does not include any rules corresponding to first packet data of a first flow received from a network, forwarding the first packet data to a host computer. Subsequent to the flow table being updated to include a new rule for the first flow, for second packet data of the first flow received from the network, the second packet data can be processed using the new rule. The second packet data can be queued. In response to receiving the first packet data from the host computer, the first packet data can be processed using the new rule. The processed packet data can be forwarded to a destination port followed by the queued second packet data.