Generation of internal interfaces for a block-based design
    1.
    发明授权
    Generation of internal interfaces for a block-based design 有权
    生成基于块的设计的内部接口

    公开(公告)号:US08875073B1

    公开(公告)日:2014-10-28

    申请号:US14185832

    申请日:2014-02-20

    Applicant: Xilinx, Inc.

    CPC classification number: G06F17/505

    Abstract: A method relating generally to computer aided design is disclosed. In such method, a block-based model of a hardware realizable system is obtained. An internal gateway-in and an internal gateway-out of a module of the block-based model are identified. An interface protocol is assigned for the internal gateway-in and the internal gateway-out. Data type and data propagation for the module at the internal gateway-in and the internal gateway-out are analyzed. The internal gateway-in and the gateway-out are transformed into an input/output interface. Integrated code is generated for subsequent realization of the input/output interface in hardware.

    Abstract translation: 公开了一般涉及计算机辅助设计的方法。 在这种方法中,获得了硬件可实现系统的基于块的模型。 识别基于块的模型的内部网关和模块的内部网关。 为内部网关和内部网关输出分配一个接口协议。 分析内部网关和内部网关的模块的数据类型和数据传播。 内部网关和网关出口被转换为输入/输出接口。 生成集成代码,用于随后在硬件中实现输入/输出接口。

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