公开(公告)号：US11036546B1

公开(公告)日：2021-06-15

申请号：US16385880

申请日：2019-04-16

Applicant: Xilinx, Inc.

Inventor： Kumud Bhandari ,  Ajit K. Agarwal

IPC: G06F9/48 ,  G06F9/54 ,  G06F16/901 ,  G06F8/10 ,  G06F15/78 ,  G06F30/20 ,  G06F11/34

Abstract: Examples herein describe techniques for generating dataflow graphs using source code for defining kernels and communication links between those kernels. In one embodiment, the graph is formed using nodes (e.g., kernels) which are communicatively coupled by edges. A compiler converts the source code into a bit stream and/or object code which configures a heterogeneous processing environment of a SoC to execute the graph. Before implementing the dataflow graph on the SoC, the programmer may wish to simulate the dataflow graph. In one embodiment, each kernel in the dataflow graph is assigned a respective thread. Additionally, the simulator can include a runtime library for simulating the different types of communication links between the kernels. Even those these communication links are different protocols or have different semantics, using the simulation components in the library makes the different types of communication links composable so they can inter-operate in the same simulation environment.