公开(公告)号：US10067189B1

公开(公告)日：2018-09-04

申请号：US15464217

申请日：2017-03-20

Applicant: Xilinx, Inc.

Inventor： Banadappa V. Shivaray ,  Ahmad R. Ansari ,  Sanjeeva R. Duggampudi ,  Pramod Surathkal ,  Ushasri Merugu ,  Bommana S. Rao ,  Sowmya Sheela Thati ,  Shashidhar S. Krishnamurthy

IPC: G01R31/3185 ,  G01R31/3177 ,  G01R31/317

Abstract: Disclosed circuitry includes input-output pads, receive flip-flops, and transmit flip-flops coupled to the input-output pads. Data path control circuitry is coupled to data path control flip-flops, the receive flip-flops and the transmit flip-flops. The data path control circuitry is configured to selectably couple the receive flip-flops and the transmit flip-flops to the input-output pads in response to states of the data path control flip-flops. Clock control circuitry is coupled to clock control flip-flops, the receive flip-flops and the transmit flip-flops. The clock control circuitry is configured to selectably apply one of multiple clock signals to the receive flip-flops and the transmit flip-flops in response to states of the clock control flip-flops. A first scan chain is coupled to the clock control flip-flops and the data path control flip-flops. A second scan chain is coupled to the receive flip-flops and the transmit flip-flops.