公开(公告)号：US20200336312A1

公开(公告)日：2020-10-22

申请号：US16921590

申请日：2020-07-06

Applicant: Xilinx, Inc.

Inventor： Steven L. POPE ,  David J. RIDDOCH ,  Paul Fox

IPC: H04L9/32 ,  G06F21/51 ,  G06F21/57 ,  G06F21/76 ,  H04L9/08

Abstract: A network interface device comprises an integrated circuit device comprises at least one processor. A network interface device comprises a memory. The integrated device is configured to execute a function with respect to at least a part of stored data in said memory.

公开(公告)号：US20210281499A1

公开(公告)日：2021-09-09

申请号：US17328941

申请日：2021-05-24

Applicant: Xilinx, Inc.

Inventor： Steven L. POPE ,  David J. RIDDOCH ,  Derek ROBERTS

IPC: H04L12/26 ,  H04L1/00

Abstract: A network interface device, said network interface device has a data transmission path configured to receive data for transmission. The data for transmission is to be sent over a network by the network interface device. A monitor is configured to monitor the data transmission path to determine if an underrun condition is associated with the data transmission path. If so, an indication is included in the transmitted data packet.

公开(公告)号：US20200174954A1

公开(公告)日：2020-06-04

申请号：US16782023

申请日：2020-02-04

Applicant: Xilinx, Inc.

Inventor： Steven L. POPE

IPC: G06F13/362 ,  G06Q40/04 ,  G06F13/42 ,  G06F13/38

Abstract: A data processing system comprising: a host computer system supporting a software entity and a receive queue for the software entity; a network interface device having a controller unit configured to provide a data port for receiving data packets from a network and a data bus interface for connection to a host computer system, the network interface device being connected to the host computer system by means of the data bus interface; and an accelerator module arranged between the controller unit and a network and having a first medium access controller for connection to the network and a second medium access controller coupled to the data port of the controller unit, the accelerator module being configured to: on behalf of the software entity, process incoming data packets received from the network in one or more streams associated with a first set of one or more network endpoints; encapsulate data resulting from said processing in network data packets directed to the software entity; and deliver the network data packets to the data port of the controller unit so as to cause the network data packets to be written to the receive queue of the software entity.

公开(公告)号：US20200213364A1

公开(公告)日：2020-07-02

申请号：US16815881

申请日：2020-03-11

Applicant: Xilinx, Inc.

Inventor： Steven L. POPE ,  David J. RIDDOCH ,  Derek ROBERTS

IPC: H04L29/06

Abstract: A rule engine receives data flows. The data flows are between a network and an application. The rule engine determines data flow information and in dependence on the information performs an action with respect to said flow. A controller provides control information to the rule engine to define one or more actions. The communications between said rule engine and said controller are secure.