公开(公告)号：US09147024B1

公开(公告)日：2015-09-29

申请号：US14535258

申请日：2014-11-06

Applicant: Xilinx, Inc.

Inventor： Vinod K. Kathail ,  Hua Sun ,  Sundararajarao Mohan ,  L. James Hwang ,  Yogesh L. Chobe

IPC: G06F17/50

CPC classification number: G06F17/505 ,  G06F17/5045

Abstract: Hardware and software co-synthesis performance estimation includes, for a design specified in a high level programming language and having a processor executable partition and a partition selected for hardware acceleration, estimating hardware latency for a hardware accelerator implementation of the selected partition, scheduling the selected partition using the hardware latency generating hardware partition latency information, and compiling an instrumented version of the design using a processor. The instrumented and compiled version of the design is executed generating software latency information. A design performance for the design is determined through combining the hardware partition latency information with the software latency information.

Abstract translation: 硬件和软件协同合成性能估计包括对于以高级编程语言指定的设计并具有处理器可执行分区和为硬件加速选择的分区，估计所选分区的硬件加速器实现的硬件延迟，调度所选择的 分区，使用硬件延迟生成硬件分区延迟信息，并使用处理器编译设计版本的设计。 设计的仪器化和编译版本执行生成软件延迟信息。 通过将硬件分区延迟信息与软件延迟信息相结合来确定设计的设计性能。

公开(公告)号：US09652570B1

公开(公告)日：2017-05-16

申请号：US14845100

申请日：2015-09-03

Applicant: Xilinx, Inc.

Inventor： Vinod K. Kathail ,  L. James Hwang ,  Sundararajarao Mohan ,  Jorge E. Carrillo ,  Hua Sun ,  Tom Shui ,  Yogesh L. Chobe

IPC: G06F17/50

CPC classification number: G06F17/505

Abstract: Implementing a system-on-chip (SOC) design specified as a high level programming language (HLL) application may include querying, using a computer, a platform description to determine an available interface of a platform for a target integrated circuit and generating, using the computer, hardware for a function of the HLL application marked for hardware acceleration and hardware coupling the marked function with the available interface of the platform. Implementing the SOC design may also include modifying, using the computer, the HLL application with program code configured to access the generated hardware for the marked function and building, using the computer, the hardware and the software of the SOC design.