CMOS solid-state image pickup apparatus utilizing selectable accumulation time results
    1.
    发明授权
    CMOS solid-state image pickup apparatus utilizing selectable accumulation time results 失效
    CMOS固态摄像装置利用可选择的累加时间结果

    公开(公告)号:US07965328B2

    公开(公告)日:2011-06-21

    申请号:US12079293

    申请日:2008-03-26

    Applicant: Yasuo Wakamori

    Inventor: Yasuo Wakamori

    CPC classification number: H04N5/3532 H04N5/374

    Abstract: Basically, en electronic shutter function of a CMOS solid-state image pickup apparatus is implemented by a rolling shutter of which exposure timing sequentially shifts between pixel rows. The exposure period for one pixel row is from a time point when readout of the pixel row is started to a time point when next readout of the pixel row is started. Thus, in order to achieve exposure similar to that of a global shutter with the same exposure period applied to all of the pixel rows, there is set a blank period where no pixel signal is read out from any one of the pixel rows, and an LED is illuminated over a predetermined portion within the blank period. In this way, the CMOS solid-state image pickup apparatus having a rolling shutter function can achieve similar exposure to a global shutter.

    Abstract translation: 基本上,CMOS固态图像拾取装置的电子快门功能通过其中曝光定时在像素行之间顺序移位的滚动快门来实现。 一个像素行的曝光周期是从像素行的读出开始到下一次读出像素行的时间点开始的时间点。 因此,为了实现与施加到所有像素行相同的曝光周期的全局快门的曝光,设置从任何一个像素行读出像素信号的空白周期,并且 LED在空白期间内的预定部分被照亮。 以这种方式,具有滚动快门功能的CMOS固态图像拾取装置可以实现与全局快门类似的曝光。

    CMOS solid state imaging device
    2.
    发明申请
    CMOS solid state imaging device 审中-公开
    CMOS固态成像装置

    公开(公告)号:US20090316031A1

    公开(公告)日:2009-12-24

    申请号:US12456554

    申请日:2009-06-18

    Applicant: Yasuo Wakamori

    Inventor: Yasuo Wakamori

    CPC classification number: H04N5/376 H04N5/3532 H04N5/35581 H04N5/374

    Abstract: Each pixel of a pixel matrix portion includes a photo diode, a floating diffusion, a transfer transistor for transferring a storage charge of the photo diode to the floating diffusion in response to a transfer pulse, a reset transistor for resetting the floating diffusion in response to a reset pulse, and a reading circuit for reading a voltage of the floating diffusion to a column signal line in response to a row selection pulse. A timing generator repeats a counting of subframes, and switches a frame consisting of the subframes in designated number. A vertical scanning circuit controls whether or not the reset pulse, the transfer pulse, and the row selection pulse should be fed to respective rows of the pixel matrix portion every subframe, and controls timings of the reset pulse and the transfer pulse in each subframe.

    Abstract translation: 像素矩阵部分的每个像素包括光电二极管,浮动扩散,用于响应于传输脉冲将光电二极管的存储电荷转移到浮动扩散的转移晶体管,用于响应于 复位脉冲,以及用于响应于行选择脉冲将浮动扩散电压读取到列信号线的读取电路。 定时发生器重复子帧的计数,并且以指定的数量切换由子帧组成的帧。 垂直扫描电路控制每个子帧是否应将复位脉冲,转移脉冲和行选择脉冲馈送到像素矩阵部分的各行,并且控制每个子帧中的复位脉冲和转移脉冲的定时。

    Hysteresis device
    3.
    发明授权
    Hysteresis device 有权
    滞后装置

    公开(公告)号:US08564350B2

    公开(公告)日:2013-10-22

    申请号:US13276071

    申请日:2011-10-18

    Applicant: Yasuo Wakamori

    Inventor: Yasuo Wakamori

    CPC classification number: G01R33/123

    Abstract: A hysteresis device produces an output signal in accordance with hysteresis characteristics that changes at a plurality of thresholds with respect to an input signal. The hysteresis apparatus includes an input signal adjusting section that outputs an adjustment signal in which an offset level corresponding to each of the plurality of thresholds is added to the input signal, a comparator that outputs a first signal based on the adjustment signal, the first signal being binarized, and a determining section that controls the input signal adjusting section to switch the offset level for each of the plurality of thresholds, that acquires the first signal for each switching of the offset level, and that produces a present output signal based on a previous output signal and the first signal corresponding to the threshold relating to a range to which the input signal is belonged.

    Abstract translation: 滞后装置根据相对于输入信号在多个阈值改变的滞后特性产生输出信号。 所述滞后装置包括:输入信号调整部,输出将与所述多个阈值中的每一个对应的偏移电平相加于所述输入信号的调整信号,基于所述调整信号输出第一信号的比较器,所述第一信号 以及确定部,其控制所述输入信号调整部切换所述多个阈值中的每个阈值的偏移电平,所述偏移电平获取所述偏移电平的每次切换的所述第一信号,并且基于 先前输出信号和对应于与输入信号所属的范围有关的阈值的第一信号。

    Hysteresis Device
    4.
    发明申请
    Hysteresis Device 有权
    滞后装置

    公开(公告)号:US20120092056A1

    公开(公告)日:2012-04-19

    申请号:US13276071

    申请日:2011-10-18

    Applicant: Yasuo Wakamori

    Inventor: Yasuo Wakamori

    CPC classification number: G01R33/123

    Abstract: A hysteresis device produces an output signal in accordance with hysteresis characteristics that changes at a plurality of thresholds with respect to an input signal. The hysteresis apparatus includes an input signal adjusting section that outputs an adjustment signal in which an offset level corresponding to each of the plurality of thresholds is added to the input signal, a comparator that outputs a first signal based on the adjustment signal, the first signal being binarized, and a determining section that controls the input signal adjusting section to switch the offset level for each of the plurality of thresholds, that acquires the first signal for each switching of the offset level, and that produces a present output signal based on a previous output signal and the first signal corresponding to the threshold relating to a range to which the input signal is belonged.

    Abstract translation: 滞后装置根据相对于输入信号在多个阈值改变的滞后特性产生输出信号。 所述滞后装置包括:输入信号调整部,输出将与所述多个阈值中的每一个对应的偏移电平相加于所述输入信号的调整信号,基于所述调整信号输出第一信号的比较器,所述第一信号 以及确定部,其控制所述输入信号调整部切换所述多个阈值中的每个阈值的偏移电平,所述偏移电平获取所述偏移电平的每次切换的所述第一信号,并且基于 先前输出信号和对应于与输入信号所属的范围有关的阈值的第一信号。

    Programmable fuzzy logic circuits
    5.
    发明授权
    Programmable fuzzy logic circuits 失效
    可编程模糊逻辑电路

    公开(公告)号:US5204935A

    公开(公告)日:1993-04-20

    申请号:US865748

    申请日:1992-04-10

    CPC classification number: G06N7/04 Y10S706/90

    Abstract: A fuzzy logic circuit for operating a fuzzy logic with "fuzziness" taken into account has an operation section memory unit in which the result of operation to be outputted in response to an input is stored in an address specified by the input, the result of operation being rewritable, whereby the change in the contents of a fuzzy logic operation to be performed can be handled merely by rewriting the contents of the operation section memory unit.

    Abstract translation: 用于操作具有“模糊性”的模糊逻辑的模糊逻辑电路具有操作部分存储单元,其中响应于输入将输出的操作结果存储在由输入指定的地址中,操作结果 可重写,从而可以仅通过重写操作部分存储单元的内容来处理要执行的模糊逻辑操作的内容的改变。

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