公开(公告)号：US06277709B1

公开(公告)日：2001-08-21

申请号：US09628214

申请日：2000-07-28

申请人： Yin-Pin Wang ,  Chung-Ju Lee ,  Wen-Jya Liang ,  Jhy-Weei Hsia ,  Fu-Liang Yang ,  Yuh-Sheng Chern

发明人： Yin-Pin Wang ,  Chung-Ju Lee ,  Wen-Jya Liang ,  Jhy-Weei Hsia ,  Fu-Liang Yang ,  Yuh-Sheng Chern

IPC分类号： H01L2176

CPC分类号： H01L21/763 ,  H01L21/76224

摘要： A method for manufacturing a shallow trench isolation structure. A pad oxide layer and a mask layer are formed over a substrate. Portions of the mask layer, the pad layer and substrate are removed forming a trench. Oxidation of the substrate within the trench forms a linear oxide layer. The substrate at the bottom of the trench is exposed by removing a portion of the linear oxide layer at the bottom of the trench. A polysilicon layer, deposited completely over the mask, fills the trench as well. The polysilicon layer on the mask layer and outside the trench is removed, leaving polysilicon within the trench, which forms a polysilicon plug. A thin conformal barrier layer is formed over the substrate. An insulator layer is deposited above the barrier layer. The isolation layer and barrier layer on top of the mask as well as outside the trench are removed using a chemical mechanical polishing method. The mask is removed.

摘要翻译： 一种用于制造浅沟槽隔离结构的方法。 在衬底上形成衬垫氧化物层和掩模层。 除去掩模层，焊盘层和衬底的部分，形成沟槽。 沟槽内的衬底的氧化形成线性氧化物层。 通过去除沟槽底部的线性氧化物层的一部分来暴露沟槽底部的衬底。 完全沉积在掩模上的多晶硅层也填充沟槽。 去除掩模层和沟槽外部的多晶硅层，留下沟槽内的多晶硅，形成多晶硅塞。 在衬底上形成薄的共形阻挡层。 绝缘体层沉积在阻挡层上方。 使用化学机械抛光方法除去掩模顶部以及沟槽外部的隔离层和阻挡层。 去除面具。

公开(公告)号：US06287921B1

公开(公告)日：2001-09-11

申请号：US09537175

申请日：2000-03-29

申请人： Yuh-Sheng Chern

发明人： Yuh-Sheng Chern

IPC分类号： H01L21336

CPC分类号： H01L21/76237 ,  H01L21/2652 ,  H01L21/823481 ,  H01L29/1041

摘要： The invention discloses a method of forming threshold voltage adjustment for MOS transistors. At first, a first oxide layer and a nitride layer are formed on a silicon substrate in sequence. Next, shallow trenches and active regions are formed by using photolithography and dry etching technology. A wet etching step is performed to remove part of the nitride layer, and then the first ion implantation for threshold voltage adjustment are performed. After accomplishing shallow trench isolations, the second ion implantation for threshold voltage adjustment are finally performed.

摘要翻译： 本发明公开了一种形成MOS晶体管的阈值电压调整的方法。 首先，依次在硅衬底上形成第一氧化物层和氮化物层。 接下来，通过使用光刻和干蚀刻技术形成浅沟槽和有源区。 执行湿蚀刻步骤以去除部分氮化物层，然后执行用于阈值电压调节的第一离子注入。 在实现浅沟槽隔离之后，最终执行用于阈值电压调节的第二离子注入。