Apparatus and method for realizing all-optical nor logic device using gain saturation characteristics of a semiconductor optical amplifier
    1.
    发明申请
    Apparatus and method for realizing all-optical nor logic device using gain saturation characteristics of a semiconductor optical amplifier 失效
    使用半导体光放大器的增益饱和特性实现全光或逻辑器件的装置和方法

    公开(公告)号:US20060158716A1

    公开(公告)日:2006-07-20

    申请号:US11039692

    申请日:2005-01-20

    IPC分类号: H01S3/00

    摘要: The present invention relates to an apparatus and a method for realizing all-optical NOR logic device using the gain saturation characteristics of a semiconductor optical amplifier (SOA). More particularly, the invention relates to a 10 Gbit/s all-optical NOR logic device among all-optical logic devices, in which a signal transmitted from a given point of an optical circuit such as an optical computing circuit is used as a pump signal and a probe signal. The method for realizing an all-optical NOR logic device using the gain saturation characteristics of the SOA according to the present invention comprises the steps of: utilizing A+B signal which couples together an input signal pattern A (1100) and an input signal pattern B (0110) as a pump signal (1110); utilizing a probe signal (1111) by generating a clock signal out of said input signal pattern A (1100); and obtaining a Boolean equation {overscore (A+B)} by making said probe signal and said pump signal incident upon the SOA simultaneously from the opposite direction. The all-optical logic device according to the present invention has a simple construction since it is realized through the XGM (Cross Gain Modulation) method which utilizes the gain saturation characteristics. Also, it is expected that the method employed in the present invention could be used for realizing other all-optical logic circuits and devices. Key Words 10 Gbit/s, All-optical NOR logic device (10 Gbit/s All-optical NOR logic device), Semiconductor Optical Amplifiers, Gain Saturation

    摘要翻译: 本发明涉及使用半导体光放大器(SOA)的增益饱和特性实现全光NOR逻辑器件的装置和方法。 更具体地说,本发明涉及全光逻辑器件中的10Gbit / s全光NOR逻辑器件,其中从诸如光计算电路的光电路的给定点发送的信号用作泵信号 和探测信号。 使用根据本发明的SOA的增益饱和特性来实现全光NOR逻辑器件的方法包括以下步骤:利用将输入信号模式A(1100)和输入信号模式(1100)耦合在一起的A + B信号 B(0110)作为泵浦信号(1110); 通过从所述输入信号模式A(1100)产生时钟信号来利用探测信号(1111); 并通过使所述探针信号和所述泵浦信号从相反方向同时入射到SOA上而获得布尔方程(A + B)。根据本发明的全光逻辑器件具有简单的结构,因为它通过 利用增益饱和特性的XGM(交叉增益调制)方法,预计本发明采用的方法可用于实现其他全光逻辑电路和器件。关键词10 Gbit / s,全部 - 光学NOR逻辑器件(10 Gbit / s全光NOR逻辑器件),半导体光放大器,增益饱和度

    Fabrication method of an epilayer structure InGaAsP/InP ridge waveguide phase modulator with high phase modulation efficiency
    2.
    发明申请
    Fabrication method of an epilayer structure InGaAsP/InP ridge waveguide phase modulator with high phase modulation efficiency 失效
    具有高相位调制效率的外延层结构InGaAsP / InP脊波导相位调制器的制造方法

    公开(公告)号:US20050148107A1

    公开(公告)日:2005-07-07

    申请号:US10751858

    申请日:2004-01-06

    IPC分类号: G02F1/015 G02F1/025 H01L21/00

    摘要: The present invention relates to a fabrication method of an epilayer structure for InGaAsP/InP ridge waveguide phase modulator with high phase modulation efficiency. In more detail, it relates to a P-p-n-N InGaAsP/InP ridge waveguide phase modulator fabricated to be that the phase change of the TE-mode is linearly proportional to the reverse bias voltage at 1.55 μm wavelength. The present invention presents a method for fabricating an epilayer structure for achieving the optical confinement in the vertical direction of an InGaAsP/InP waveguide phase modulator, characterized by comprising the steps of: forming a first cladding layer of N-InP on an N+-InP substrate; forming a first waveguide layer of n-InGaAsP and a second waveguide layer of p-InGaAsP in sequence on the first cladding layer; forming a second cladding layer of P-InP and a third cladding layer of P-InP in sequence on the second waveguide layer; and forming an electrode layer of p+-InGaAs on the third cladding layer.

    摘要翻译: 本发明涉及具有高相位调制效率的InGaAsP / InP脊波导相位调制器的外延层结构的制造方法。 更详细地,涉及一种P-p-n-N InGaAsP / InP脊波导相位调制器,其制造为TE模式的相变与1.55mum波长处的反向偏置电压成线性比例。 本发明提供了一种制造用于实现InGaAsP / InP波导相位调制器的垂直方向上的光限制的外延层结构的方法,其特征在于包括以下步骤:在N + -InP底物; 在第一包层上依次形成n-InGaAsP的第一波导层和p-InGaAsP的第二波导层; 在第二波导层上依次形成P-InP的第二包层和P-InP的第三包层; 以及在所述第三覆层上形成p + + / - InGaAs的电极层。