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公开(公告)号:US12019354B2
公开(公告)日:2024-06-25
申请号:US18317025
申请日:2023-05-12
Applicant: PsiQuantum, Corp.
Inventor: Mark G. Thompson , Gabriel Mendoza , Alain Shang
Abstract: A system includes a first photonic integrated circuit. The circuit includes a qubit encoder configured to receive a spatial-mode qubit and convert the spatial-mode qubit to a temporal-mode qubit and an optical interconnect configured to receive and transmit the temporal-mode qubit. The system further includes a second photonic integrated circuit, itself including a qubit decoder configured to receive the temporal-mode qubit and convert the temporal-mode qubit back into the spatial-mode qubit.
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公开(公告)号:US20240152027A1
公开(公告)日:2024-05-09
申请号:US18052219
申请日:2022-11-03
Applicant: International Business Machines Corporation
Inventor: Darius Urbonas , Thilo Hermann Curt Stoeferle , Rainer F. Mahrt
IPC: G02F3/00
CPC classification number: G02F3/00 , G02F2201/06 , G02F2203/15
Abstract: An optical gate device may have one or more optical cavities. The optical cavity may have an embedded optically-active material providing strong light-matter coupling. A pump input allows application to of a pulsed optical pump beam the optically-active material. The pump beam is absorbed by the optically active material to form an exciton-polariton condensate which emits light. The optical gate device may have an input waveguide to input a seed signal to the optical cavity. The optical gate device may include an output waveguide to output of an optical signal at a wavelength corresponding to a resonant mode of a the cavity. The device may operate in a manner such that, when the pump beam is applied to the pump input, an optical output signal is selectively provided in the output waveguide, via the input of the a seed signal and light emitted by the exciton-polariton condensate.
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3.
公开(公告)号:US20230221619A1
公开(公告)日:2023-07-13
申请号:US17910835
申请日:2021-07-22
Inventor: Xiaomin CHENG , Zhuli HE , Yunlai ZHU , Han LI , Xiangshui MIAO
IPC: G02F3/00
CPC classification number: G02F3/00 , G02F2201/307 , G02F2203/50 , G02F2203/11
Abstract: The disclosure provides a straight waveguide phase change all-photonic Boolean logic device and a full binary logic implementation method thereof, including a straight waveguide structure, a phase change functional unit covered on top of a waveguide and a protective layer thereof, and a waveguide Bragg grating structure. In terms of the logic implementation method, optical pulses are respectively input from two ends of the device to modulate the state of the phase change functional unit. The parameters of the waveguide Bragg grating structure are set to reflect the wavelength of the pump optical pulse, so that write pulses input from the two ends only act on the phase change functional unit closest to that end. A probe optical pulse with a specific wavelength is selected, and the probe light under the wavelength is less reflected by the waveguide Bragg grating and does not affect the reading of the state of the device. The disclosure has advantages such as anti-electromagnetic interference and parallel operation. Functions of 16 types of binary Boolean logic operation are implemented, which greatly improves the work efficiency of logic operation.
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公开(公告)号:US11646803B2
公开(公告)日:2023-05-09
申请号:US17227192
申请日:2021-04-09
Applicant: Psiquantum, Corp.
Inventor: Terence Rudolph , Hugo Cable
CPC classification number: H04B10/70 , G02B6/12016 , G02F3/00 , G02B2006/12152 , G02B2006/12159 , G02B2006/12164 , G06E1/00
Abstract: An expanded Bell state generator can generate a Bell state on four output modes of a set of m output modes, where m is greater than four. Some expanded Bell state generators can receive inputs on any four of a set of 2m input modes. Subsets of the m output modes can be multiplexed to reduce the number of modes to four. According to some embodiments, a set of 2×2 muxes can be used to rearrange the output modes prior to reducing the number of modes.
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公开(公告)号:US20180239216A1
公开(公告)日:2018-08-23
申请号:US15440110
申请日:2017-02-23
Applicant: International Business Machines Corporation
CPC classification number: G02F3/00 , B82Y10/00 , B82Y20/00 , G02B5/045 , G02B6/1225 , G02B2006/12145 , G02F2202/36 , Y10S977/774 , Y10S977/933
Abstract: A media-defined optical logic circuit composed of a set of light-transmitting polyhedral prisms arranged so that a pair of adjacent prisms can exchange photonic signals through adjacent surfaces. Each prism contains one or more quantum dots that, when excited by a photonic signal received from an adjacent prism, respond by emitting light that becomes an incoming photonic signal for an adjacent prism. Photonic signals are propagated through the circuit in this manner along light-guide paths created by shading certain surfaces to render them fully or partially opaque. The prisms and shading are arranged such that the circuit performs a certain logic function. When the circuit receives a set of photonic input signals representing a binary input value, the circuit responds by emitting a set of photonic output signals that represent a binary output value determined by performing the logic function upon the binary input value.
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公开(公告)号:US20180180970A1
公开(公告)日:2018-06-28
申请号:US15900118
申请日:2018-02-20
Applicant: Daniel S. Klotzer
Inventor: Daniel S. Klotzer
Abstract: Optical information processing systems and methods including quantum computing logic gates, quantum computing memory configurations, and quantum computing entanglement discernment methods. Realization manners include linear optical components as well as rectangular waveguides lithographed on silicon chips.
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公开(公告)号:US20180035090A1
公开(公告)日:2018-02-01
申请号:US15457967
申请日:2017-03-13
Applicant: Sutherland Cook Ellwood, JR.
Inventor: Sutherland Cook Ellwood, JR.
CPC classification number: H04N9/67 , G02F3/00 , H04N9/3179 , H04N9/76
Abstract: Decomposition of components of an integrated photonic-signal “converter” into discrete signal processing stages. A basic logic “state” is separated from a color modulation stage which is separated from an intensity modulation stage. This may be thought of as a telecom signal-processing architecture applied to the problem of visible image photonic-signal modulation. For example, three signal-processing stages and three separate device components and operations are proposed. Although additional signal-influencing operations may be added and are contemplated, conversion from conventional signal to other forms such as polaritons, surface plasmons, and superposition of signal and the like are proposed.
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公开(公告)号:US20170293079A1
公开(公告)日:2017-10-12
申请号:US15626256
申请日:2017-06-19
Applicant: Zhengbiao Ouyang
Inventor: Zhengbiao Ouyang , Quanqiang Yu
CPC classification number: G02B6/1225 , B82Y20/00 , G02B6/125 , G02B2006/1213 , G02F1/365 , G02F3/00
Abstract: The present invention discloses a PhC all-optical self-AND-transformation logic gate, which comprises an optical-switch unit, a PhC-structure unit, a NOT-logic gate and a D-type flip-flop unit; said clock-signal CP is connected with an input port of the two-branch waveguide, said two output ports of the two-branch waveguide are respectively connected with the input port of said NOT-logic gate and a first clock-signal-input port of said PhC-structure unit; the output port of said NOT-logic gate is connected with the second clock-signal-input port of said D-type flip-flop unit; the signal-output port of the PhC structure is connected with the D-signal-input port of said D-type flip-flop unit; a logic-signal X is connected with the logic-signal-input port of said PhC-structure unit. The structure of the present invention is compact in structure and ease of integration with other optical-logic elements.
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公开(公告)号:US20170285441A1
公开(公告)日:2017-10-05
申请号:US15626206
申请日:2017-06-19
Applicant: Zhengbiao Ouyang
Inventor: Zhengbiao Ouyang , Quanqiang Yu
CPC classification number: G02F3/00 , G02B6/1225 , G02B6/3544 , G02F1/3511 , G02F1/365 , G02F2201/06 , G02F2202/32
Abstract: A photonic crystal all-optical D-type flip-flop includes an optical switch unit, a photonic crystal structure unit including two signal-input ends, a signal-output end and an idle port, a wave absorbing load and a reference-light source; the clock signal-input port of the photonic crystal structure unit is connected with a clock control signal; a second port of the photonic crystal structure unit is an intermediate signal-input port, said intermediate signal-input end of the photonic crystal structure unit is connected with a first intermediate signal-output end of the optical selector switch; a logic signal is connected with the first signal-input end of the optical switch unit; the absorbing load is connected with a second intermediate signal-output end of the optical switch unit; said reference-light source is connected with a second signal-input end of the optical switch unit, which is a reference-light input end connecting with the output end of said reference-light source.
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10.
公开(公告)号:US09746750B2
公开(公告)日:2017-08-29
申请号:US14185419
申请日:2014-02-20
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor: Chulki Kim , Jae Hun Kim , Byeong Ho Park , Seok Lee , Seong Chan Jun , Taikjin Lee
CPC classification number: G02F3/00 , B82Y10/00 , B82Y20/00 , G02B27/286 , G02F2202/36 , G02F2203/07 , Y10S977/941
Abstract: An optical logic gate includes: a DNA based nanostructure including DNA and metal nanoparticles coupled to the DNA, the DNA based nanostructure being configured to rotate a polarization plane of an incident light; a polarizer to which light passing through the DNA based nanostructure is incident, the polarizer being configured to extract a component in a direction of a predetermined reference axis from light whose polarization plane is rotated by the DNA based nanostructure; and a detection unit to which light passing through the polarizer is incident, the detection unit being configured to generate a logic signal based on a result obtained by comparing the intensity of the component in the reference axis direction extracted by the polarizer with a predetermined threshold value.
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