公开(公告)号：US06639282B2

公开(公告)日：2003-10-28

申请号：US10126399

申请日：2002-04-19

申请人： Young-ki Lee ,  Heon-jong Shin ,  Ji-woon Rim

发明人： Young-ki Lee ,  Heon-jong Shin ,  Ji-woon Rim

IPC分类号： H01L2701

CPC分类号： H01L29/66772 ,  H01L29/78624

摘要： A semiconductor device on a SOI and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor wafer having a SOI structure including an insulating layer having a predetermined thickness and a monocrystalline silicon layer formed on the insulating layer, an isolation insulating layer formed on the insulating layer on the semiconductor wafer, a gate comprised of a gate dielectric layer and a gate conductive layer, which are sequentially stacked on the monocrystalline silicon layer, insulating layer spacers formed at the sidewalls of the gate, and a source junction and a drain junction asymmetrically formed at either side of the gate between the isolation insulating layer spacers and the insulating layer. In the semiconductor device formed on a SOI, source and drain junctions are formed at either side of a gate to be asymmetrical, and thus a ground of a transistor is formed on the SOI, and thus the electrical characteristics of the semiconductor device are improved.

摘要翻译： 提供SOI上的半导体器件及其制造方法。 半导体器件包括具有SOI结构的半导体晶片，该SOI结构包括具有预定厚度的绝缘层和形成在绝缘层上的单晶硅层，形成在半导体晶片上的绝缘层上的隔离绝缘层，由栅极 电介质层和栅极导电层，其顺序地堆叠在单晶硅层上，在栅极的侧壁处形成的绝缘层间隔物以及不对称地形成在隔离绝缘层的栅极两侧的源极结和漏极结 间隔物和绝缘层。 在SOI上形成的半导体器件中，在栅极的任一侧形成源极和漏极结以使其不对称，从而在SOI上形成晶体管的接地，从而提高半导体器件的电气特性。

公开(公告)号：US06943084B2

公开(公告)日：2005-09-13

申请号：US10636415

申请日：2003-08-07

申请人： Young-ki Lee ,  Heon-jong Shin ,  Ji-woon Rim

发明人： Young-ki Lee ,  Heon-jong Shin ,  Ji-woon Rim

IPC分类号： H01L27/12 ,  H01L21/336 ,  H01L21/84 ,  H01L29/78 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L29/66772 ,  H01L29/78624

摘要： A semiconductor device on a SOI and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor wafer having a SOI structure including an insulating layer having a predetermined thickness and a monocrystalline silicon layer formed on the insulating layer, an isolation insulating layer formed on the insulating layer on the semiconductor wafer, a gate comprised of a gate dielectric layer and a gate conductive layer, which are sequentially stacked on the monocrystalline silicon layer, insulating layer spacers formed at the sidewalls of the gate, and a source junction and a drain junction asymmetrically formed at either side of the gate between the isolation insulating layer spacers and the insulating layer. In the semiconductor device formed on a SOI, source and drain junctions are formed at either side of a gate to be asymmetrical, and thus a ground of a transistor is formed on the SOI, and thus the electrical characteristics of the semiconductor device are improved.

摘要翻译： 提供SOI上的半导体器件及其制造方法。 半导体器件包括具有SOI结构的半导体晶片，该SOI结构包括具有预定厚度的绝缘层和形成在绝缘层上的单晶硅层，形成在半导体晶片上的绝缘层上的隔离绝缘层，由栅极 电介质层和栅极导电层，其顺序地堆叠在单晶硅层上，在栅极的侧壁处形成的绝缘层间隔物以及不对称地形成在隔离绝缘层的栅极两侧的源极结和漏极结 间隔物和绝缘层。 在SOI上形成的半导体器件中，在栅极的任一侧形成源极和漏极结以使其不对称，从而在SOI上形成晶体管的接地，从而提高半导体器件的电气特性。