摘要:
Embodiments of the present invention provide techniques for efficient generation of CRC values in a network environment. Specific embodiments of the present invention enable CRC processing circuits that can generate CRC values at high data throughput rates (e.g., 100 Gbps or greater), while being capable of being implemented on currently available FPGAs. Accordingly, embodiments of the present invention may be used in network devices such as routers, switches, hubs, host network interfaces and the like to support high speed data transmission standards such as 100G Ethernet and beyond.
摘要:
Techniques that offer enhanced diversity in the selection of paths (e.g., ECMP paths) and/or ports from ports associated with trunks for forwarding data traffic. In one embodiment, one or more functions are used to generate a result. A first portion of the generated result may be used as an index (e.g., ECMP index) for selecting a path (e.g., an ECMP path) from multiple possible paths for forwarding a packet. A second portion of the generated result, different from the first portion, may be used as an index (trunk index) for selecting an output port from multiple output ports associated with a trunk for forwarding a packet. In this manner, selected portions of the generated result may be used as indices, one for selecting a path and another for selecting a trunk port for forwarding packets such that the two indices are not the same and are not dependent upon one another.
摘要:
Embodiments of the present invention provide techniques for efficient generation of CRC values in a network environment. Specific embodiments of the present invention enable CRC processing circuits that can generate CRC values at high data throughput rates (e.g., 100 Gbps or greater), while being capable of being implemented on currently available FPGAs. Accordingly, embodiments of the present invention may be used in network devices such as routers, switches, hubs, host network interfaces and the like to support high speed data transmission standards such as 100G Ethernet and beyond.
摘要:
Techniques for efficiently performing division and modulo operations in a programmable logic device. In one set of embodiments, the division and modulo operations are synthesized as one or more alternative arithmetic operations, such as multiplication and/or subtraction operations. The alternative arithmetic operations are then implemented using dedicated digital signal processing (DSP) resources, rather than non-dedicated logic resources, resident on a programmable logic device. In one embodiment, the programmable logic device is a field-programmable gate array (FPGA), and the dedicated DSP resources are pre-fabricated on the FPGA. Embodiments of the present invention may be used in Ethernet-based network devices to support the high-speed packet processing necessary for 100G Ethernet, 32-port (or greater) trunking, 32-port/path (or greater) load balancing (such as 32-path ECMP), and the like.
摘要:
Embodiments of the present invention provide techniques for efficient generation of CRC values in a network environment. Specific embodiments of the present invention enable CRC processing circuits that can generate CRC values at high data throughput rates (e.g., 100 Gbps or greater), while being capable of being implemented on currently available FPGAs. Accordingly, embodiments of the present invention may be used in network devices such as routers, switches, hubs, host network interfaces and the like to support high speed data transmission standards such as 100G Ethernet and beyond.
摘要:
Embodiments of the present invention provide techniques for efficient generation of CRC values in a network environment. Specific embodiments of the present invention enable CRC processing circuits that can generate CRC values at high data throughput rates (e.g., 100 Gbps or greater), while being capable of being implemented on currently available FPGAs. Accordingly, embodiments of the present invention may be used in network devices such as routers, switches, hubs, host network interfaces and the like to support high speed data transmission standards such as 100G Ethernet and beyond.
摘要:
Techniques that offer enhanced diversity in the selection of paths (e.g., ECMP paths) and/or ports from ports associated with trunks for forwarding data traffic. In one embodiment, one or more functions are used to generate a result. A first portion of the generated result may be used as an index (e.g., ECMP index) for selecting a path (e.g., an ECMP path) from multiple possible paths for forwarding a packet. A second portion of the generated result, different from the first portion, may be used as an index (trunk index) for selecting an output port from multiple output ports associated with a trunk for forwarding a packet. In this manner, selected portions of the generated result may be used as indices, one for selecting a path and another for selecting a trunk port for forwarding packets such that the two indices are not the same and are not dependent upon one another.
摘要:
Techniques that assist in processing of failure detection protocol (FDP) packets. Techniques are provided that assist a CPU of a network device in processing incoming FDP packets. In one embodiment, a module is provided in a network device for detecting and flagging the non-receipt of FDP packets by the network device for one or more FDP sessions. In this manner, the task of detecting non-receipt of FDP packets is offloaded from the CPU of the network device. This enables the network device to support newer FDPs with shorter periodic interval requirements.
摘要:
The present invention provides an oral formulation comprising ingredients extracted from Caulis Sinomenii, Radix Aconiti Lateralis Preparata, Radix Paeoniae Alba, Cortex Moutan, and Rhizoma Curcumae Longae. The formulation has anti-arthritic, anti-inflammatory and anti-nociceptive properties and is suitable for the treatment of arthritis, symptoms associated with arthritis and other similar conditions.
摘要:
A packet classifier and a method for routing a data packet are provided. The packet classifier includes a content addressable memory, a translation table and a parameter memory. The method includes looking up a content addressable memory for a base address into a parameter memory using a header of the data packet. The base address is related to the routes under ECMP for forwarding the data packet. From among these addresses, using multiple headers of the data packet, an adjustment to the base address is computed. The adjustment specifies an actual address to the parameter memory corresponding to a selected route for forwarding the data packet. The parameter memory is then accessed using the actual address to obtain parameter values relevant to the selected route. The data packet is then forwarded according to the parameter values thus obtained.