公开(公告)号：US5391900A

公开(公告)日：1995-02-21

申请号：US994056

申请日：1992-12-18

申请人： Yuichi Onodera ,  Toshihiro Okabe ,  Yasuhiro Matsuura ,  Munehiro Sasakawa

发明人： Yuichi Onodera ,  Toshihiro Okabe ,  Yasuhiro Matsuura ,  Munehiro Sasakawa

IPC分类号： H01L21/3205 ,  G06F17/50 ,  H01L21/82 ,  H01L21/822 ,  H01L23/52 ,  H01L23/528 ,  H01L27/04 ,  H01L27/02 ,  H01L27/10

CPC分类号： G06F17/5068 ,  H01L23/528 ,  H01L2924/0002

摘要： The present invention relates to an integrated circuit comprising a semiconductor chip having thereon a logical function portion for realizing logical function and at least one power supply point for supplying electric power to the logical function portion, and at least one first, second and third power trunk line are arranged on the chip for supplying electric power from the power supply point to the logical function portion. The second power trunk line is disposed in an area in which the logical function portion of the chip is disposed. The first power trunk line is disposed between the power supply point and the second power trunk line to connect the second power trunk line with the power supply point. The third trunk line is connected at at least one end to the second trunk line and is disposed in the logical function portion for supplying electric power to the logical function portion.

摘要翻译： 本发明涉及一种集成电路，其包括具有用于实现逻辑功能的逻辑功能部分的半导体芯片和用于向逻辑功能部分提供电力的至少一个电源点，以及至少一个第一，第二和第三电力中继线 线路布置在芯片上，用于从电源点向逻辑功能部分提供电力。 第二电源中继线设置在芯片的逻辑功能部分设置的区域中。 第一电力中继线设置在电源点和第二电力中继线之间，以将第二电力中继线与电源点连接。 第三干线在至少一端连接到第二干线，并且设置在用于向逻辑功能部分供电的逻辑功能部分中。