摘要:
The present invention provides a silicon/silicon carbide composite and having a high quality in avoiding warp or breakage and in a corrosion resistance, a durability, a heat shock resistance and particularly suitable used for semiconductor heat treatment member such as a dummy wafer or the like and a process for manufacturing a high purity silicon/silicon carbide composite containing a limited amount of carbon left without reaction. The present invention uses a silicon/silicon carbide composite comprised of 45 to 75 weight % of silicon and 25 to 55 weight % silicon carbide, said silicon carbide being formed from an assembly of fibers each having a thickness of 150 μm or less and a length of 0.8 to 3.5 mm. The present invention is directed to a process for manufacturing a silicon/silicon carbide composite which comprises a first step where cellulose fibers with a fiber thickness of 150 μm or less is heated at a temperature of 500° C. to 1500° C. in a non-oxidizing atmosphere to produce a porous carbon body with a bulk density of 0.10 to 0.80 g/cm3 and a second step where said porous carbon body is silicification in an atmosphere containing silicon.
摘要翻译:本发明提供一种硅/碳化硅复合材料,并且具有高质量以避免翘曲或断裂,并具有耐腐蚀性,耐久性,耐热冲击性,并且特别适合用于诸如虚拟晶片等的半导体热处理部件 以及含有有限量的没有反应的碳的高纯度硅/碳化硅复合材料的制造方法。 本发明使用由45至75重量%的硅和25至55重量%的碳化硅组成的硅/碳化硅复合体,所述碳化硅由各自具有150μm或更小的厚度的纤维组合形成,并且长度 为0.8〜3.5mm。 本发明涉及一种制造硅/碳化硅复合材料的方法,其包括第一步骤,其中将纤维厚度为150μm或更小的纤维素纤维在500℃至1500℃的温度下加热至 非氧化性气氛,生成体积密度为0.10〜0.80g / cm 3的多孔碳体,第二工序为,在含有硅的气氛中使多孔碳体硅化。
摘要:
FIG. 1 is a perspective view of a protective cover for tablet showing my new design; FIG. 2 is another perspective view thereof; FIG. 3 is a front elevational view thereof; FIG. 4 is a rear elevational view thereof; FIG. 5 is a left side elevational view thereof; FIG. 6 is a right side elevational view thereof; FIG. 7 is a top plan view thereof; FIG. 8 is a bottom plan view thereof; FIG. 9 is a perspective view of the protective cover for tablet shown in a configuration of use; FIG. 10 is another perspective view of the protective cover for tablet shown in the configuration of use; FIG. 11 is another perspective view of the protective cover for tablet shown in the configuration of use; FIG. 12 is another perspective view of the protective cover for tablet of FIG. 1, shown in the configuration of use with an environmental tablet; and, FIG. 13 is another perspective view of the protective cover for tablet of FIG. 1, shown in the configuration of use with additional environmental trinkets. The broken lines in FIGS. 12 and 13 showing the tablet and the trinkets depict environment and form no part of the claimed design. The other broken lines in the drawings depict portions of the protective cover for tablet that form no part of the claimed design.
摘要:
A method and system to support scheduling of memory store instructions across atomic regions in binary translation in a processing unit or processor. In one embodiment of the invention, the processing unit has a store buffer that allows store instructions to be issued in different order than the source binary program order but still retire in source binary program order. This facilitates a small atomic region that maps to each iteration of a source binary code and these atomic regions are joined together into a pipelined region. In one embodiment of the invention, the processing unit executes commit instruction(s) once every loop iteration instead of executing the commit instruction(s) once after the loop exit.
摘要:
Methods, apparatuses and storage medium associated with ISA bridging with callback, are disclosed. In various embodiments, at least one computer-readable storage medium may include instructions configured to enable a target device with a target ISA, in response to execution of the instructions, to provide an ISA bridging layer to the target device to facilitate a library service to callback a callback function of an application. The library service may be implemented for the target ISA, and the application may be implemented at least partially for a source ISA that may be different from the target ISA. The ISA bridging layer may include a source ISA emulator and a library emulator configured to cooperate to enable the application to call the library service, and the library service to callback the callback function, across the two instruction set architectures. Other embodiments may be disclosed or claimed.
摘要:
Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.
摘要:
Methods and apparatuses for creating a dynamic profile for a plurality of structurally similar extensible markup language (XML) documents based at least in part on a document structure or data pattern of the XML documents. A specialized XML parser is generated based at least in part on the dynamic profile and then is specialized in parsing XML documents that substantially match the dynamic profile.
摘要:
Methods, systems, and articles for receiving, by a computing device, execution results of a plurality of query language expressions are described herein. In various embodiments, the plurality of query language expressions may be concurrently executed, and the receiving may be contemporaneous with production of the execution results. Also, in various embodiments, the computing device may store a result item of the execution results for at least a first of the query language expressions in a memory block allocated exclusively for the first of the query language expressions while the first of the query language expressions is being executed, or in a result handle associated with the first of the query language expressions.
摘要:
A binary translation module is to translate a first sequence of instructions associated with a source architecture into a second sequence of instructions associated with a target architecture. The first sequence includes one or more floating point control instructions and the second sequence does not include a floating point control instruction. Results produced by executing the second sequence on a processor that complies with the target architecture are substantially the same as results produced by executing the first sequence on a processor that complies with the source architecture.
摘要:
FIG. 1 is a front perspective view of a protective cover with kickstands for tablet showing my new design; FIG. 2 is a rear perspective view thereof; FIG. 3 is a front elevational view thereof; FIG. 4 is a rear elevational view thereof; FIG. 5 is a left side elevational view thereof; FIG. 6 is a right side elevational view thereof; FIG. 7 is a top plan view thereof; FIG. 8 is a bottom plan view thereof; FIG. 9 is a rear perspective view of the protective cover with kickstands for tablet showing the kickstands in an open state; and, FIG. 10 is a front perspective view of the protective cover with kickstands for tablet showing the kickstands in an open state in the environment of a tablet. The dash-dash broken lines illustrate portions of the protective cover with kickstands for tablet. In FIG. 10, additional dash-dash broken lines illustrate environment and dash-dot-dash broken lines depict boundaries. All broken lines form no part of the claimed design.