公开(公告)号：US20250121610A1

公开(公告)日：2025-04-17

申请号：US18381131

申请日：2023-10-17

Applicant: ZEBRA TECHNOLOGIES CORPORATION

Inventor： Daniel F. Donato ,  Dwight D. Dipert ,  Kenneth V. Naegele ,  Ashok K. Charles

IPC: B41J2/355

Abstract: A method includes: obtaining, at a controller of a device, a delay setting corresponding to an effector head configured to engage with the device, the effector head having (i) an array of effector elements, (ii) a first switch assembly controllable to deliver power to a first subset of the effector elements, and (iii) a second switch assembly configured to deliver power to a second subset of the effector elements; at the controller, activating the array of effector elements by: controlling the first switch assembly to deliver power to the first subset during a first time period, and controlling the second switch assembly to deliver power to the second subset during a second time period, the second time period shifted relative to the first time period according to the delay setting.

公开(公告)号：US11247495B2

公开(公告)日：2022-02-15

申请号：US16863722

申请日：2020-04-30

Applicant: ZEBRA TECHNOLOGIES CORPORATION

Inventor： Robert P. Gotschewski ,  Daniel V. Carroll ,  Dwight D. Dipert ,  Thomas P. Zwier

IPC: B41J23/00 ,  B41J25/00

Abstract: A print head assembly for a media processing device comprises: a print head including an interface and a latch receiver on an upper surface of the print head; and a print head carrier including: (i) a base plate having an opening to receive the latch receiver therethrough when the print head is positioned at a lower surface of the base plate; (ii) an adapter to engage with the interface of the print head; and (iii) a latch bar on an upper surface of the base plate, the latch bar slideable between a first position to engage with the latch receiver and lock the print head to the base plate, and a second position to disengage from the latch receiver and release the print head from the base plate.

公开(公告)号：US10814642B2

公开(公告)日：2020-10-27

申请号：US16739881

申请日：2020-01-10

Applicant: ZEBRA TECHNOLOGIES CORPORATION

Inventor： Dwight D. Dipert ,  Daniel F. Donato

IPC: B41J2/35 ,  B41J2/175 ,  B41J2/355 ,  B41J2/14

Abstract: A media processing device is disclosed. An example media processing device includes memory including machine-readable instructions; and a processor to execute the machine-readable instructions to control a printhead assembly, the processor being configured to communicate with the printhead assembly in accordance with a pin configuration, wherein the pin configuration includes pin groups, and each of the pin groups includes a signal line and a reference voltage, wherein the signal line pin is coupled to a source of changing values, and the reference voltage pin is coupled to a constant voltage.

公开(公告)号：US20210339547A1

公开(公告)日：2021-11-04

申请号：US16863722

申请日：2020-04-30

Applicant: ZEBRA TECHNOLOGIES CORPORATION

Inventor： Robert P. Gotschewski ,  Daniel V. Carroll ,  Dwight D. Dipert ,  Thomas P. Zwier

IPC: B41J25/00

Abstract: A print head assembly for a media processing device comprises: a print head including an interface and a latch receiver on an upper surface of the print head; and a print head carrier including: (i) a base plate having an opening to receive the latch receiver therethrough when the print head is positioned at a lower surface of the base plate; (ii) an adapter to engage with the interface of the print head; and (iii) a latch bar on an upper surface of the base plate, the latch bar slideable between a first position to engage with the latch receiver and lock the print head to the base plate, and a second position to disengage from the latch receiver and release the print head from the base plate.

公开(公告)号：US10569542B2

公开(公告)日：2020-02-25

申请号：US15238290

申请日：2016-08-16

Applicant: Zebra Technologies Corporation

Inventor： Dwight D. Dipert ,  Daniel F. Donato

IPC: B41J2/14

Abstract: Printhead pin configurations are disclosed. An example printhead assembly includes an interface to place the printhead assembly in communication with a logic circuit; and a logic circuit configured according to a pin configuration, the pin configuration comprising pin groups, wherein each of the pin groups includes a signal line and a reference voltage.

公开(公告)号：US20200147963A1

公开(公告)日：2020-05-14

申请号：US16739881

申请日：2020-01-10

Applicant: ZEBRA TECHNOLOGIES CORPORATION

Inventor： Dwight D. Dipert ,  Daniel F. Donato

IPC: B41J2/14 ,  B41J2/175 ,  B41J2/35 ,  B41J2/355

Abstract: A media processing device is disclosed. An example media processing device includes memory including machine-readable instructions; and a processor to execute the machine-readable instructions to control a printhead assembly, the processor being configured to communicate with the printhead assembly in accordance with a pin configuration, wherein the pin configuration includes pin groups, and each of the pin groups includes a signal line and a reference voltage, wherein the signal line pin is coupled to a source of changing values, and the reference voltage pin is coupled to a constant voltage.