公开(公告)号：US12235779B2

公开(公告)日：2025-02-25

申请号：US18041790

申请日：2022-12-15

Applicant: ZHEJIANG LAB

Inventor： Xuyang Zhao

IPC: G06F9/54 ,  G06F13/28

Abstract: The present disclosure discloses a time-sensitive network switch including a plurality of multi-core CPUs. In the time-sensitive network switch, by the parallel data processing method with multi-core system-on-chips (SoC), industrial real-time data are distributed to multi-core SoCs for processing in parallel. The processed data are scheduled according to the identified priority, and are arranged to the different priority queues of the port in order to process the high-priority data first, which reduces the processing time for the data in the device. The data passes through the security encryption engine in the time-sensitive network switch, which ensures the security for processing data in the device. The reliability, real-time and stability of the data transmission in the time-sensitive network are improved.

公开(公告)号：US12212454B2

公开(公告)日：2025-01-28

申请号：US18041538

申请日：2022-11-22

Applicant: ZHEJIANG LAB

Inventor： Xuyang Zhao

IPC: H04L41/0803 ,  H04J3/02 ,  H04L41/12

Abstract: The present disclosure discloses a data transmission method and system in time-sensitive network, which relates to the technical field of time-sensitive network of industrial Internet. The devices include multiple industrial end stations, multiple time-sensitive network switches and a network configuration operating system. In the present disclosure, the method and system can effectively reduce the processing time overhead of time-sensitive data in devices and is compatible with traditional Ethernet data transmission.