公开(公告)号：US11463096B2

公开(公告)日：2022-10-04

申请号：US17489809

申请日：2021-09-30

申请人： ZHEJIANG UNIVERSITY

发明人： Zhiwei Xu ,  Jiangbo Chen ,  Jiabing Liu ,  Hui Nie ,  Kaijie Ding ,  Chunyi Song

IPC分类号： H03L7/18 ,  H03L7/089 ,  H03L7/099 ,  H04B1/40

摘要： Disclosed is a zero-delay phase-locked loop frequency synthesizer based on multi-stage synchronization, which belongs to the technical field of integrated circuits. The zero-delay phase-locked loop frequency synthesizer comprises: a phase frequency detector, a charge pump, a loop pass filter, a voltage control oscillator and a multi-stage synchronization divider, wherein the phase frequency detector, the charge pump, the loop pass filter and the voltage control oscillator are connected in sequence; an output OUT of the voltage control oscillator is connected to an input IN of the multi-stage synchronization divider; and an output OUT of the multi-stage synchronization divider is connected to an input IN of the phase frequency detector, so as to form a feedback path.