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1.发明申请Method and system for introducing physical damage into an integrated circuit device for verifying testing program and its results 有权将物理损伤引入集成电路设备的方法和系统，以验证测试程序及其结果公开(公告)号：US20120086468A1
公开(公告)日：2012-04-12
申请号：US12925031
申请日：2010-10-12
申请人： Zhihong Mai , Pik Kee Tan , Guo Chang Man , Jeffrey Lam , Liang Choo Hsia
发明人： Zhihong Mai , Pik Kee Tan , Guo Chang Man , Jeffrey Lam , Liang Choo Hsia
IPC分类号： H03K19/003
CPC分类号： G01R31/311 , G01R31/001 , G01R31/318511
摘要： According to an embodiment of the disclosure, a method verifies bitmap information or test data information for a semiconductor device. The method places a defect on a semiconductor device at an actual defect location using a laser to physically damage the semiconductor device. A logical address associated with the defect is detected and bitmap information or test data information is reviewed to determine an expected location corresponding to the logical address. Then, the accuracy of the bitmap information or the test data information is determined by comparing the actual defect location with the expected location. A deviation between the two indicates an inaccuracy.
摘要翻译： 根据本公开的实施例，一种方法验证半导体器件的位图信息或测试数据信息。 该方法使用激光将实际缺陷位置的缺陷放置在半导体器件上以物理地损坏半导体器件。 检测与缺陷相关联的逻辑地址，并且对位图信息或测试数据信息进行检查以确定对应于逻辑地址的期望位置。 然后，通过将实际缺陷位置与预期位置进行比较来确定位图信息或测试数据信息的准确度。 两者之间的偏差表示不准确。
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2.发明授权Method and system for introducing physical damage into an integrated circuit device for verifying testing program and its results 有权将物理损伤引入集成电路设备的方法和系统，以验证测试程序及其结果公开(公告)号：US08489945B2
公开(公告)日：2013-07-16
申请号：US12925031
申请日：2010-10-12
申请人： Zhihong Mai , Pik Kee Tan , Guo Chang Man , Jeffrey Lam , Liang Choo Hsia
发明人： Zhihong Mai , Pik Kee Tan , Guo Chang Man , Jeffrey Lam , Liang Choo Hsia
IPC分类号： G11C29/00
CPC分类号： G01R31/311 , G01R31/001 , G01R31/318511
摘要： According to an embodiment of the disclosure, a method verifies bitmap information or test data information for a semiconductor device. The method places a defect on a semiconductor device at an actual defect location using a laser to physically damage the semiconductor device. A logical address associated with the defect is detected and bitmap information or test data information is reviewed to determine an expected location corresponding to the logical address. Then, the accuracy of the bitmap information or the test data information is determined by comparing the actual defect location with the expected location. A deviation between the two indicates an inaccuracy.
摘要翻译： 根据本公开的实施例，一种方法验证半导体器件的位图信息或测试数据信息。 该方法使用激光将实际缺陷位置的缺陷放置在半导体器件上以物理地损坏半导体器件。 检测与缺陷相关联的逻辑地址，并且对位图信息或测试数据信息进行检查以确定对应于逻辑地址的期望位置。 然后，通过将实际缺陷位置与预期位置进行比较来确定位图信息或测试数据信息的准确度。 两者之间的偏差表示不准确。
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