摘要:
Systems and methods for improving substrate fabrication are provided. Subsets of dies of substrates may be inspected at various points in the fabrication process to generate spectra data. The spectra data can be used to generate data that are input to a machine learning model to predict yields for the substrates.
摘要:
A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.
摘要:
A wafer processing method and apparatus, a storage medium and an electronic device are disclosed, relating to the field of integrated circuit (IC) manufacturing and wafer stacking. The wafer processing method includes: partitioning a target wafer into one or more pre-divided areas each having one or more dies; determining area ratings for each pre-divided area based on test data of the dies in each pre-divided area; and feeding the area ratings of the pre-divided areas to a trained classification model to determine a classification category of the target wafer; identifying a second wafer having a same classification category as the target wafer; and stacking the target wafer with the second wafer. This method improves the production yield of stacked ICs.
摘要:
An electronic assembly has a host wafer having a first circuit including wafer transistors and passive, non-transistor devices. Chiplets have a second circuit including at least one radio frequency (RF) transistor device. Electrical interconnects are between the chiplets and wafer. The electrical interconnects electrically connect the first circuit to the second circuits. Oscillators that have the wafer transistor, the RF transistor and the electrical interconnects produce a signal for built-in self-test circuits for testing an assembly design of the electronic assembly and speeds of the RF chiplet transistors.
摘要:
A method of identifying defects in an electronic assembly, comprising, by a processing unit, obtaining a grid of nodes representative of a location of electronic units of an electronic assembly, wherein each node is neighboured by at most eight other nodes, wherein a first plurality of nodes represents failed electronic units according to at least one test criterion, and a second plurality of nodes represents passing electronic units according to the least one first test criterion, based on the grid, determining at least one first and second straight lines, and attempting to connect the first and second straight lines into a new line, wherein if at least one node from the new line belongs to the second plurality of nodes, concluding that an electronic unit represented by the node on the grid is a failed electronic unit, thereby facilitating identification of a failed electronic unit on the substrate.
摘要:
Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, (2) providing die on wafer with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuity, and (3) providing a connectivity mechanism between the bidirectional transceiver circuitry's of the tester and a selected group or all of the die on wafer for communication of the JTAG signals.
摘要:
Aspects of the invention include a wafer test device with a conformal laminate and rigid probes extending from the laminate to form an electrical connection with a microcircuit under test. The wafer test device also includes a spring plate on a side of the laminate that is opposite a side from which the rigid probes extend. The spring plate includes a conformal inner frame and a rigid outer frame. The laminate is attached to the inner frame of the spring plate.
摘要:
A ferromagnetic resonance (FMR) measurement system is disclosed with a waveguide transmission line (WGTL) connected at both ends to a mounting plate having an opening through which the WGTL is suspended. While the WGTL bottom surface contacts a portion of magnetic film on a whole wafer, a plurality of microwave frequencies is sequentially transmitted through the WGTL. Simultaneously, a magnetic field is applied to the contacted region thereby causing a FMR condition in the magnetic film. After RF output is transmitted through or reflected from the WGTL to a RF detector and converted to a voltage signal, effective anisotropy field, linewidth, damping coefficient, and/or inhomogeneous broadening are determined based on magnetic field intensity, microwave frequency and voltage output. A plurality of measurements is performed by controllably moving the WGTL or wafer and repeating the simultaneous application of microwave frequencies and magnetic field at additional preprogrammed locations on the magnetic film.
摘要:
A method and a system for determining one or more parameters for electrical testing of a wafer are provided. One method includes determining electrical test paths through a device being formed on a wafer and physical layout components in different layers of the device corresponding to each of the electrical test paths. The method also includes determining one or more parameters of electrical testing for the wafer based on one or more characteristics of the electrical test paths. In addition, the method includes acquiring information for one or more characteristics of a physical version of the wafer. The information is generated by performing an inline process on the physical version of the wafer. The method further includes altering at least one of the one or more parameters of the electrical testing for the wafer based on the acquired information.
摘要:
An electric field sensor includes sense and reference cells. The sense cell produces a resistance that varies relative to an intensity of an electric field, and the reference cell produces a resistance that is invariable relative to the intensity of the electric field. An output signal indicative of the intensity of the electric field is determined using the difference between the resistances. A system includes an electric field source that outputs a digital test program as an electric field signal. The system further includes the electric field sensor formed with IC dies on a wafer. The electric field sensor receives the electric field signal. The received electric field signal is converted to the test program, and the test program is stored in memory on the wafer. The electric field source does not physically contact the dies, but can flood an entire surface of the wafer with the electric field signal.