公开(公告)号：US20220328380A1

公开(公告)日：2022-10-13

申请号：US17639736

申请日：2020-08-27

Applicant: ams AG

Inventor： Georg PARTEDER ,  Jochen KRAFT ,  Stefan JESSENIG

IPC: H01L23/48 ,  H01L21/768

Abstract: An open through-substrate via, TSV, comprises an insulation layer disposed adjacent to at least a portion of side walls of a trench and to a surface of a substrate body. The TSV further comprises a metallization layer disposed adjacent to at least a portion of the insulation layer and to at least a portion of a bottom wall of said trench, a redistribution layer disposed adjacent to at least a portion of the metallization layer and a portion of the insulation layer disposed adjacent to the surface, and a capping layer disposed adjacent to at least a portion of the metallization layer and to at least a portion of the redistribution layer. The insulation layer and/or the capping layer comprise sublayers that are distinct from each other in terms of material properties. A first of the sublayers is disposed adjacent to at least a portion of the side walls and to at least a portion of the surface and a second of the sublayers is disposed adjacent to at least a portion of the surface.

公开(公告)号：US20220352016A1

公开(公告)日：2022-11-03

申请号：US17771350

申请日：2020-10-23

Applicant: ams AG

Inventor： Georg PARTEDER ,  Thomas BODNER

IPC: H01L21/768 ,  H01L27/146 ,  H01L23/48 ,  H01L29/10

Abstract: A method is proposed of producing a semiconductor body with a trench. The semiconductor body comprises a substrate. The method comprising the step of etching the trench into the substrate using an etching mask. An oxide layer is formed at least on a sidewall of the trench by oxidation of the substrate. A passivation layer is formed on the oxide layer and the bottom of the trench. The passivation layer is removed from the bottom of the trench. Finally, a metallization layer is deposited into the trench.

公开(公告)号：US20210175153A1

公开(公告)日：2021-06-10

申请号：US17052452

申请日：2019-03-20

Applicant: ams AG

Inventor： Jochen KRAFT ,  Georg PARTEDER ,  Anderson PIRES SINGULANI ,  Raffaele COPPETA ,  Franz SCHRANK

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/528

Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.5 times the lateral extent of the via in the lateral direction, and the lateral extent of the contact layer is smaller than the lateral extent of the via or the lateral extent of the contact layer amounts to at least 2.5 times the lateral extent of the via.