公开(公告)号：US20140207994A1

公开(公告)日：2014-07-24

申请号：US14161064

申请日：2014-01-22

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Abdallah CHERKAOUI ,  Christian DIERKES ,  Lars KOPKA

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  H04L12/40032 ,  H04L12/40169 ,  H04L12/42

Abstract: A circuit arrangement for connecting a bus participant to at least one bus, having an interface for connecting the bus participant to the circuit arrangement, a first bus input, and a first bus output between which the bus participant is switchable via the interface. The circuit arrangement includes a second bus input and output for connecting the bus to the circuit arrangement in a ring topology in such a way that the first bus output is connected at least indirectly to the second bus input and the second bus output is connected at least indirectly to the first bus input via the bus. The bus in the circuit arrangement can be separated to obtain a line topology and can be configured as bus-terminating at one of the bus inputs or bus outputs. A system for the functional testing of bus participants on a bus in a simulation environment is provided.

Abstract translation: 一种用于将总线参与者连接到至少一个总线的电路装置，具有用于将总线参与者连接到电路装置的接口，第一总线输入和第一总线输出，总线参与者可以经由接口切换。 该电路装置包括第二总线输入和输出，用于以总线输出端至少间接地连接至第二总线输入端，并且至少连接第二总线输出端，以将总线连接到环形拓扑中的电路装置 间接地通过总线输入第一个总线。 电路布置中的总线可以分离以获得线路拓扑，并可以配置为总线端接在总线输入或总线输出之一。 提供了一种用于模拟环境中总线上总线参与者功能测试的系统。