METHOD FOR OPTIMIZING UTILIZATION OF PROGRAMMABLE LOGIC ELEMENTS IN CONTROL UNITS FOR VEHICLES
    1.
    发明申请
    METHOD FOR OPTIMIZING UTILIZATION OF PROGRAMMABLE LOGIC ELEMENTS IN CONTROL UNITS FOR VEHICLES 有权
    优化车辆控制单元中可编程逻辑元件的使用方法

    公开(公告)号:US20150205281A1

    公开(公告)日:2015-07-23

    申请号:US14602571

    申请日:2015-01-22

    Inventor: Olaf Grajetzky

    CPC classification number: G05B19/05 G05B17/02 G06F17/5022

    Abstract: A method and a system for optimizing utilization of a programmable logic element for use in an electronic control unit for vehicles, wherein the programmable logic element has a soft CPU and/or an unused remaining area. A plurality of model variants is generated that reproduce functionality of the control unit, and generate a plurality of soft CPU configurations with differing configuration scope, which occupy an area corresponding to the configuration scope of the programmable logic element, and execute processor-in-the-loop simulations for the plurality of model variants and/or soft CPU configurations after instantiation of the soft CPU corresponding to the soft CPU configuration on a programmable logic element. The profiling data acquired for the soft CPU during the PIL simulation is used with regard to the processing of the input signal for optimizing utilization of the programmable logic element.

    Abstract translation: 一种用于优化用于车辆的电子控制单元的可编程逻辑元件的利用的方法和系统,其中所述可编程逻辑元件具有软CPU和/或未使用的剩余区域。 生成多个模型变型,其再现控制单元的功能,并且生成具有不同配置范围的多个软CPU配置,其占据与可编程逻辑元件的配置范围对应的区域,并且执行处理器 在可编程逻辑元件上对应于软CPU配置的软CPU实例化之后的多个模型变型和/或软CPU配置的循环模拟。 关于用于优化可编程逻辑元件的利用的输入信号的处理,使用在PIL仿真期间为软CPU获取的分析数据。

    Method for optimizing utilization of programmable logic elements in control units for vehicles

    公开(公告)号:US09977417B2

    公开(公告)日:2018-05-22

    申请号:US14602571

    申请日:2015-01-22

    Inventor: Olaf Grajetzky

    CPC classification number: G05B19/05 G05B17/02 G06F17/5022

    Abstract: A method and a system for optimizing utilization of a programmable logic element for use in an electronic control unit for vehicles, wherein the programmable logic element has a soft CPU and/or an unused remaining area. A plurality of model variants is generated that reproduce functionality of the control unit, and generate a plurality of soft CPU configurations with differing configuration scope, which occupy an area corresponding to the configuration scope of the programmable logic element, and execute processor-in-the-loop simulations for the plurality of model variants and/or soft CPU configurations after instantiation of the soft CPU corresponding to the soft CPU configuration on a programmable logic element. The profiling data acquired for the soft CPU during the PIL simulation is used with regard to the processing of the input signal for optimizing utilization of the programmable logic element.

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