公开(公告)号：US08199263B2

公开(公告)日：2012-06-12

申请号：US12862791

申请日：2010-08-25

申请人： De-Jiun Li

发明人： De-Jiun Li

IPC分类号： G02F1/1335

CPC分类号： G06F3/045 ,  G02F1/1339 ,  G06F2203/04104

摘要： A method of manufacturing a multi-touch LCD panel. A conductive colloidal mixture formed by mixing a plurality of conductive particles and a colloid is coated on the electrode layer of the counter substrate and is solidified to make the conductive particles electrically connect to the corresponding sensing electrodes of the array substrate. Consequently, when an external force is applied to one touching position on the counter substrate, the conductive particles electrically connect the sensing electrodes to the electrode layer and the touching signal of the position can be obtained. Due to the integration of the conductive particles into the liquid crystal cell gap, the multi-touch LCD panel has the advantages of slimness and lightness. Moreover, the manufacturing process of the conductive particles is introduced after the conventional counter substrate manufacturing method, and the objective of simple process, low cost and high yields can be achieved.

摘要翻译： 一种制造多点触控LCD面板的方法。 通过混合多个导电颗粒和胶体形成的导电胶体混合物涂覆在相对基板的电极层上并固化，使导电颗粒电连接到阵列基板的对应检测电极。 因此，当对相对基板上的一个接触位置施加外力时，导电颗粒将感测电极电连接到电极层，并且可以获得位置的触摸信号。 由于导电粒子与液晶单元间隙的集成，所以多点触摸式LCD面板具有纤薄和亮度的优点。 此外，导电粒子的制造工序是在常规的相对基板制造方法之后引入的，可以实现简单的工艺，低成本和高产率的目的。

公开(公告)号：US08188518B2

公开(公告)日：2012-05-29

申请号：US12869754

申请日：2010-08-27

申请人： Chih-Chung Liu

发明人： Chih-Chung Liu

IPC分类号： H01L29/786

CPC分类号： H01L29/42384 ,  G02F1/1368 ,  H01L27/124 ,  H01L29/41733

摘要： A thin film transistor structure of a pixel is provided. In the present invention, a first metal layer serves as a gate electrode, and the gate electrode includes an extending gate electrode portion. A second metal layer includes a drain electrode partially and respectively overlapping the gate electrode and the gate electrode portion with the amorphous silicon layer interposed therebetween so as to form a first parasitic capacitor and a second parasitic capacitor. The total capacitance of the first parasitic capacitor and the second parasitic capacitor is invariable to withstand deviation caused by vibration of the machine in the photolithographic process, so that undesired effects in the liquid crystal display panel such as mura and flicker can be reduced.

摘要翻译： 提供像素的薄膜晶体管结构。 在本发明中，第一金属层用作栅电极，栅极包括延伸的栅电极部分。 第二金属层包括部分地分别与栅电极和栅电极部分重叠的非极性硅层的漏电极，以形成第一寄生电容器和第二寄生电容器。 第一寄生电容器和第二寄生电容器的总电容不可避免地在光刻工艺中承受由机器的振动引起的偏差，从而可以降低液晶显示面板中的不期望的影响，例如mura和闪烁。

公开(公告)号：US07932519B1

公开(公告)日：2011-04-26

申请号：US12868711

申请日：2010-08-25

申请人： Chih-Chung Liu

发明人： Chih-Chung Liu

IPC分类号： H01L33/16

CPC分类号： H01L27/14603

摘要： A pixel structure includes a scan line, a data line, a gate electrode, a semiconductor layer, a source electrode, a drain electrode including a comb-shaped part surrounding the source electrode and a connecting part, and a pixel electrode electrically connected to the drain electrode. The scan line and the data line are arranged intersectedly and electrically insulated from each other. At least a portion of the source electrode and the drain electrode are disposed on the semiconductor layer. At least one branch of the comb-shaped part extends outside one side of the gate electrode to form a protrusion part. The connecting part extends from the comb-shaped part beyond the other side of the gate electrode. The protrusion part and the connecting part aligned with the margin of the gate electrode have a first width and a third width respectively, wherein the first width substantially equals to the third width.

摘要翻译： 像素结构包括扫描线，数据线，栅电极，半导体层，源电极，包括围绕源电极的梳状部分的漏电极和连接部分，以及电连接到源电极的像素电极 漏电极。 扫描线和数据线彼此交叉且电绝缘地排列。 源电极和漏电极的至少一部分设置在半导体层上。 梳状部分的至少一个分支延伸到栅电极的一侧外侧以形成突出部分。 连接部从梳状部延伸超过栅电极的另一侧。 与栅电极的边缘对准的突出部分和连接部分分别具有第一宽度和第三宽度，其中第一宽度基本上等于第三宽度。

公开(公告)号：US08018399B2

公开(公告)日：2011-09-13

申请号：US12868710

申请日：2010-08-25

申请人： Chih-Chung Liu

发明人： Chih-Chung Liu

IPC分类号： G09G3/20 ,  G09G3/36

CPC分类号： G02F1/136286 ,  G02F1/13624 ,  G02F2001/134345

摘要： A pixel array includes scan lines extended along a row direction in a zigzag manner, data lines extended along a column direction, and pixels connected the scan lines and the data lines. Each pixel arranged in nth row includes a first sub-pixel and a second sub-pixel. The first sub-pixel includes a first transistor and a first pixel electrode. A first gate electrode and a first drain electrode of the first transistor are respectively connected to the (n+1)th scan line and the first pixel electrode. A second sub-pixel includes a second transistor and a second pixel electrode. A second gate electrode and a second drain electrode of the second transistor are respectively connected to the nth scan line and the second sub-pixel electrode. A first source electrode of the first transistor and a second source electrode of the second transistor are connected to the same data line.

摘要翻译： 像素阵列包括以锯齿形方式沿行方向延伸的扫描线，沿列方向延伸的数据线以及连接扫描线和数据线的像素。 排列在第n行的每个像素包括第一子像素和第二子像素。 第一子像素包括第一晶体管和第一像素电极。 第一晶体管的第一栅电极和第一漏电极分别连接到第（n + 1）扫描线和第一像素电极。 第二子像素包括第二晶体管和第二像素电极。 第二晶体管的第二栅电极和第二漏极电极分别连接到第n扫描线和第二子像素电极。 第一晶体管的第一源电极和第二晶体管的第二源电极连接到相同的数据线。

公开(公告)号：US08269310B2

公开(公告)日：2012-09-18

申请号：US12466675

申请日：2009-05-15

申请人： Chiu-Chuan Chen

发明人： Chiu-Chuan Chen

IPC分类号： H01L21/02

CPC分类号： G02F1/136213 ,  G02F2001/136236 ,  G02F2001/136295 ,  G02F2201/305 ,  G02F2201/40 ,  H01L27/1255 ,  H01L27/1288

摘要： Disclosed is a method of manufacturing a storage capacitor having increased aperture ratio: providing a substrate having a metal layer disposed thereon, and said metal layer is covered correspondingly with a first dielectric layer and a second dielectric layer in sequence; forming a photoresist layer with a uniform thickness to cover said second dielectric layer; performing a process of exposure-to-light and development to a portion of said photoresist layer that is correspondingly disposed over said metal layer sequentially, so that its thickness is less than its original thickness; removing said photoresist layer and etching said portion of said second dielectric layer, so that a thickness of said portion of said second dielectric layer is less than its original thickness, and the etching depth of said portion is greater than that of the other remaining portions of said second dielectric layer; and forming an electrode layer on said second dielectric layer.

摘要翻译： 公开了一种制造具有增加的开口率的存储电容器的方法：提供其上设置有金属层的基板，并且所述金属层依次由第一介电层和第二介电层覆盖; 形成均匀厚度的光致抗蚀剂层以覆盖所述第二介电层; 对所述光致抗蚀剂层的一部分进行曝光和发光处理，所述光致抗蚀剂层相应地依次设置在所述金属层上，使得其厚度小于其原始厚度; 去除所述光致抗蚀剂层并蚀刻所述第二电介质层的所述部分，使得所述第二电介质层的所述部分的厚度小于其原始厚度，并且所述部分的蚀刻深度大于其余部分的蚀刻深度 所述第二电介质层; 以及在所述第二电介质层上形成电极层。

公开(公告)号：US08159627B2

公开(公告)日：2012-04-17

申请号：US12405805

申请日：2009-03-17

申请人： Wei-Chuan Lin ,  Lung-chuan Chang

发明人： Wei-Chuan Lin ,  Lung-chuan Chang

IPC分类号： G02F1/1333

CPC分类号： G02F1/136259 ,  G02F2001/136254 ,  G02F2202/103 ,  H01L27/124

摘要： Disclosed is a pixel layout structure capable of increasing the capability of detecting amorphous silicon (a-Si) residue defects and a method for manufacturing the same. Wherein, an a-Si dummy layer is disposed on either one side or both sides of each data line. The design of such an a-Si dummy layer is utilized, so that in an existing testing conditions (by making use of an existing automatic array tester in carrying out the test), in case that there exists an a-Si residue in a pixel, the pixel having defects can be detected through an enhanced capacitance coupling effect and an electron conduction effect. Therefore, through the application of the above-mentioned design, the capability of an automatic array tester can effectively be increased in detecting a defective pixel having a-Si residues.

摘要翻译： 公开了能够提高检测非晶硅（a-Si）残留缺陷的能力的像素布局结构及其制造方法。 其中，a-Si虚拟层设置在每条数据线的一侧或两侧。 使用这种a-Si虚拟层的设计，使得在现有的测试条件（通过利用现有的自动阵列测试仪进行测试）中，在像素中存在a-Si残留的情况下 可以通过增强的电容耦合效应和电子传导效应来检测具有缺陷的像素。 因此，通过应用上述设计，可以有效地提高自动阵列测试仪的检测能力，以检测具有a-Si残留的缺陷像素。

公开(公告)号：US20130083280A1

公开(公告)日：2013-04-04

申请号：US13304320

申请日：2011-11-24

申请人： Chih-Chung Liu ,  Kuan-Hsien Jiang ,  Bei Xie ,  XiYao Li

发明人： Chih-Chung Liu ,  Kuan-Hsien Jiang ,  Bei Xie ,  XiYao Li

IPC分类号： G02F1/1343 ,  H01J9/24

CPC分类号： G02F1/134363 ,  G02F1/136286 ,  G02F2001/134381 ,  H01L27/1288

摘要： An array substrate of a fringe field switching (FFS) mode liquid crystal display (LCD) panel and manufacturing method thereof are provided. The gate electrodes and the common electrode of the FFS mode LCD panel are formed on the array substrate by the same photolithographic process, and the common electrode, the gate lines and the gate electrodes are disposed on the same layer. The passivation layer of the FFS mode LCD panel is formed on the pixel electrodes. The passivation layer has a plurality of first openings, and each of the first openings at least partially exposes the pixel electrodes.

摘要翻译： 提供了边缘场切换（FFS）模式液晶显示（LCD）面板的阵列基板及其制造方法。 FFS模式LCD面板的栅电极和公共电极通过相同的光刻工艺形成在阵列基板上，公共电极，栅极线和栅电极设置在同一层上。 FFS模式LCD面板的钝化层形成在像素电极上。 钝化层具有多个第一开口，并且每个第一开口至少部分地露出像素电极。

公开(公告)号：US08120720B2

公开(公告)日：2012-02-21

申请号：US12868745

申请日：2010-08-26

申请人： Chih-Chung Liu ,  XiYao Li

发明人： Chih-Chung Liu ,  XiYao Li

IPC分类号： G02F1/136

CPC分类号： H01L27/124 ,  H01L29/41733

摘要： A pixel structure includes a scan line, a data line, a gate electrode electrically connected to the scan line, a semiconductor layer disposed on the gate electrode, a drain electrode, an extending electrode, and a pixel electrode. The scan line and the data line cross each other, and are insulated. The drain electrode includes a contact part disposed outside the gate electrode, an electrode part disposed on the semiconductor pattern and a connecting part extending from the contact part along a direction to connect the electrode part, and partially overlapping the gate electrode. The pixel electrode is connected to the contact part. The extending electrode is connected to the scan line. A first end of the extending electrode points to the semiconductor layer along the direction, and overlaps the drain electrode. A first width of the connecting part is equal to the second width of the extending electrode.

摘要翻译： 像素结构包括扫描线，数据线，电连接到扫描线的栅电极，设置在栅电极上的半导体层，漏电极，延伸电极和像素电极。 扫描线和数据线交叉，绝缘。 漏电极包括设置在栅电极外部的接触部分，设置在半导体图案上的电极部分和从接触部分沿连接电极部分的方向延伸的部分重叠的栅电极的连接部分。 像素电极连接到接触部分。 延伸电极连接到扫描线。 延伸电极的第一端沿着该方向指向半导体层，并与漏电极重叠。 连接部的第一宽度等于延伸电极的第二宽度。

公开(公告)号：US08384837B2

公开(公告)日：2013-02-26

申请号：US12818178

申请日：2010-06-18

申请人： I-Ming Cheng ,  De Bian

发明人： I-Ming Cheng ,  De Bian

IPC分类号： G02F1/136259

CPC分类号： G02F1/136259 ,  G02F2001/136263 ,  H01L21/76894 ,  H01L27/124

摘要： A repair method for an array substrate of a liquid crystal display device includes, providing an array substrate for a liquid crystal display device, detecting a line defect of a signal transmitting wire and locating the line defect, performing a removal process to remove a shielding layer covering two ends of the line defect and the shielding layer extending to a common line adjacent to the line defect, performing a deposition process to deposit a connecting metal layer the region where the shielding layer is removed, and performing a cutting process to cut outer ends of the common line adjacent to the line defect to form a common line section. The signal transmitting wire forms an electrical circuit with the common line section.

摘要翻译： 液晶显示装置的阵列基板的维修方法包括：提供液晶显示装置的阵列基板，检测信号传输线的线路缺陷并定位线路缺陷，执行去除处理以去除屏蔽层 覆盖线缺陷的两端和屏蔽层延伸到与线缺陷相邻的公共线，执行沉积工艺以在连接金属层上沉积除去屏蔽层的区域，并执行切割工艺以切割外端 的公共线与线缺陷相邻以形成公共线段。 信号传输线与公共线路部分形成电路。

公开(公告)号：US08223286B2

公开(公告)日：2012-07-17

申请号：US12869723

申请日：2010-08-26

申请人： Chih-Chung Liu ,  Cheng-Hsin Chen

发明人： Chih-Chung Liu ,  Cheng-Hsin Chen

IPC分类号： G02F1/136

CPC分类号： G02F1/13624 ,  G02F1/136286 ,  G02F2201/40 ,  G02F2201/52 ,  H01L27/12 ,  H01L27/124

摘要： The present invention provides a display panel including a plurality of dual-gate pixel units connected to each other through data lines, gate lines and common lines. Each dual-gate pixel unit includes a first pixel and a second pixel respectively connected to a first gate line and a second gate line, and shares a common line and a data line. The first pixel and the second pixel are respectively disposed at two opposite sides of the common line, and they are also respectively disposed at two opposite sides of the first data line and the second gate line. The data lines transfer data signals into pixels, and the gate lines control the pixels to receive the data signals. The present invention raises an aperture ratio of each pixel of the display panel, and reduces the probability of the gate line and the common line being short-circuited.

摘要翻译： 本发明提供了一种显示面板，其包括通过数据线，栅极线和公共线彼此连接的多个双栅极像素单元。 每个双栅极像素单元包括分别连接到第一栅极线和第二栅极线的第一像素和第二像素，并且共享公共线和数据线。 第一像素和第二像素分别设置在公共线的两个相对侧，并且它们也分别设置在第一数据线和第二栅极线的两个相对侧。 数据线将数据信号传输成像素，栅极线控制像素以接收数据信号。 本发明提高了显示面板的每个像素的开口率，并且降低了栅极线和公共线短路的可能性。