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公开(公告)号：US20220321067A1
公开(公告)日：2022-10-06
申请号：US17711935
申请日：2022-04-01
申请人： Sehat Sutardja
发明人： Sehat Sutardja
摘要： A LNA comprises an input, a transformer structure and a first transistor and a second transistor, each having gate, source, and drain terminals. The transformer structure has a first winding pair, a second winding pair and a third winding pair. Each winding of the first winding pair connects to the input node and one source terminals of the transistors. The second winding pair is proximate the first winding pair. The second winding pair connects to a ground node and the transistor source terminals. The third winding pair is proximate the first winding pair and it connects to a bias signal source and a gate terminal of the transistors. An output connects to the transistor drain terminals. The windings of the first and second winding pairs are offset and rotated 180 degrees with respect to the other winding in the pair. The third winding pair performs a Gm boost function.
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公开(公告)号：US20230230764A1
公开(公告)日：2023-07-20
申请号：US18094292
申请日：2023-01-06
申请人： Sehat Sutardja
发明人： Sehat Sutardja
CPC分类号： H01F29/10 , H01F27/2804 , H01F27/292
摘要： A transformer comprising a first signal path in a first plane or layer and a second signal path in the same plane or layer. The second signal path is offset in a diagonally direction in relation to the first signal path, such that the first signal path and the second signal path are in proximity to establish electric-field coupling between the first signal path and the second signal path. A jumper, located in a second plane, is electrically connected to either the first signal path or the second signal path through vias that extend from the first plane to the second plane. The jumper prevents electrical contact between the first and the second signal path at locations where the first and the second signal path would otherwise intersect on the first plane. The shape of the first and second signal paths may be square or rectangular, or both.
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公开(公告)号：US11495400B2
公开(公告)日：2022-11-08
申请号：US16559578
申请日：2019-09-03
申请人： Sehat Sutardja
发明人： Sehat Sutardja
摘要： A transformer comprising a primary winding and a secondary winding. The primary winding has N2 number turns and having a first terminal and a second terminal. The secondary winding has having N1 fractional portions, which together form a full turn, are in close proximity to the primary winding to establish coupling between the primary winding and the N1 fractional coil portions, the transformer turn ratio from the primary winding to the secondary winding is N2:(N3/N1) where N2 is an integer equal to or greater than 1, N1 is an integer greater than or equal to 2, and N3 is an integer greater than or equal to 1. Also disclosed is a stacked integrated transformer having a primary winding and secondary winding of which one or both have a waterfall structure and a portion of which functions as a ground connected shield between the secondary winding and the primary winding.
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公开(公告)号：US11948729B2
公开(公告)日：2024-04-02
申请号：US16559554
申请日：2019-09-03
申请人： Sehat Sutardja
发明人： Sehat Sutardja
CPC分类号： H01F27/363 , H01F17/0013 , H01F19/04 , H01F27/2804 , H01F27/288 , H01F27/32 , H01F27/36 , H03H7/38
摘要： A transformer comprising a primary winding and a secondary winding. The primary winding has N2 number turns and having a first terminal and a second terminal. The secondary winding has having N1 fractional portions, which together form a full turn, are in close proximity to the primary winding to establish coupling between the primary winding and the N1 fractional coil portions, the transformer turn ratio from the primary winding to the secondary winding is N2:(N3/N1) where N2 is an integer equal to or greater than 1, N1 is an integer greater than or equal to 2, and N3 is an integer greater than or equal to 1. Also disclosed is a stacked integrated transformer having a primary winding and secondary winding of which one or both have a waterfall structure and a portion of which functions as a ground connected shield between the secondary winding and the primary winding.
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公开(公告)号：US11842845B2
公开(公告)日：2023-12-12
申请号：US17974434
申请日：2022-10-26
申请人： Sehat Sutardja
发明人： Sehat Sutardja
CPC分类号： H01F27/363 , H01F17/0013 , H01F19/04 , H01F27/2804 , H01F27/288 , H01F27/32 , H01F27/36 , H03H7/38
摘要： A transformer comprising a primary winding and a secondary winding. The primary winding has N2 number turns and having a first terminal and a second terminal. The secondary winding has having N1 fractional portions, which together form a full turn, are in close proximity to the primary winding to establish coupling between the primary winding and the N1 fractional coil portions, the transformer turn ratio from the primary winding to the secondary winding is N2:(N3/N1) where N2 is an integer equal to or greater than 1, N1 is an integer greater than or equal to 2, and N3 is an integer greater than or equal to 1. Also disclosed is a stacked integrated transformer having a primary winding and secondary winding of which one or both have a waterfall structure and a portion of which functions as a ground connected shield between the secondary winding and the primary winding.
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公开(公告)号：US20230327669A1
公开(公告)日：2023-10-12
申请号：US18132294
申请日：2023-04-07
申请人： Sehat Sutardja
发明人： Sehat Sutardja
IPC分类号： H03K19/003 , H03K17/16
CPC分类号： H03K19/00315 , H03K19/00361 , H03K17/162
摘要： A noise tolerant buffer circuit, configured to interface a controller to a switching device, that includes an input, a first buffer, a second buffer, an output, and a switching device. The input provides a control signal to the first buffer cell input. The first buffer cell processes the control signal to generate a second buffer output. The second buffer cell processes the output of the first buffer to generate a second buffer output. The switching device is configured to receive an output of the second buffer and perform a switching operation based on the output of the second buffer. The switching operation generates noise that couples back to the first buffer cell and the second buffer cell, and the noise is divided between the first buffer cell and a second buffer to thereby reduce the noise to a value that does not trigger the first buffer or the second buffer.
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公开(公告)号：US20240212926A1
公开(公告)日：2024-06-27
申请号：US18516838
申请日：2023-11-21
申请人： Sehat Sutardja
发明人： Sehat Sutardja
CPC分类号： H01F27/363 , H01F17/0013 , H01F19/04 , H01F27/2804 , H01F27/288 , H01F27/32 , H01F27/36 , H03H7/38
摘要： A transformer comprising a primary winding and a secondary winding. The primary winding has N2 number turns and having a first terminal and a second terminal. The secondary winding has having N1 fractional portions, which together form a full turn, are in close proximity to the primary winding to establish coupling between the primary winding and the N1 fractional coil portions, the transformer turn ratio from the primary winding to the secondary winding is N2:(N3/N1) where N2 is an integer equal to or greater than 1, N1 is an integer greater than or equal to 2, and N3 is an integer greater than or equal to 1. Also disclosed is a stacked integrated transformer having a primary winding and secondary winding of which one or both have a waterfall structure and a portion of which functions as a ground connected shield between the secondary winding and the primary winding.
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公开(公告)号：US20230409073A1
公开(公告)日：2023-12-21
申请号：US18212101
申请日：2023-06-20
申请人： Sehat Sutardja
发明人： Sehat Sutardja
IPC分类号： G06F1/08
CPC分类号： G06F1/08
摘要： A latch for a flip-flop or other circuit which requires fewer signal inputs than prior latch designs to reduce power consumption. The latch comprises a first transistor set is switching element and is configured to receive clock signals from a clock network and an input signal. A second transistor receives the input signal from the first transistor set and is configured as a first data buffer to create a latch output. A feedback path includes a third transistor set in series with a resistor or transistor pair. The feedback path receives the latch output and generates a feedback signal, which is provided to the first transistor set. The resistor or transistor pair is selected to establish the feedback signal at a magnitude that is sufficiently large to maintain the state of the latch but sufficiently small to allow a change in the input signal to change the latch output.
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公开(公告)号：US20230327460A1
公开(公告)日：2023-10-12
申请号：US18132902
申请日：2023-04-10
申请人： Sehat Sutardja
发明人： Sehat Sutardja
IPC分类号： H02J7/00
CPC分类号： H02J7/0014 , H02J7/0047
摘要： A battery and battery balancing system comprising a battery pack comprising two or more cells connected in series and a separate balancing cell, which is not series connected in the battery pack. The balancing cell is configured to be selectively switched into connection with one or more cells of the battery pack. A charging input is configured to accept a charging current from a power source to charge the battery pack. Two or more balancing cell switches, responsive to switch control signals, configured to selectively connect the balancing cell to a cell in the battery pack. A cell monitoring and switch control unit configured to monitor cell parameters during charging and generate the switch control signals, such that upon the monitoring determining that a cell in the battery pack is an underperforming cell, switching the balancing cell into connection with the underperforming cell to supplement the underperforming cell.
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公开(公告)号：US20240356499A1
公开(公告)日：2024-10-24
申请号：US18622565
申请日：2024-03-29
申请人： Sehat Sutardja
发明人： Sehat Sutardja
CPC分类号： H03F1/565 , H03F3/245 , H03F2200/222 , H03F2200/387 , H03F2200/451
摘要： An amplifier system comprising an input matching network configured to receive an input signal from a signal source. The input matching network is configured to impedance match between the amplifier system and the signal source. An input transformer is configured to receive the impedance matched input signal and perform voltage step down and current step up. An amplifier is configured to receive and amplify an output signal from the input transformer to generate an amplified signal. A low winding ratio output transformer provides isolation between an antenna and amplifier. An output matching network is configured to impedance match to an antenna and provide voltage step up. The input transformer may have a ratio of 2N:N, such as 2:1 ratio. At least one center tap of the input transformer may connect to a bias voltage. The amplifier system may be configured for operation in the radio frequency band.
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