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    Reducing steady state error in fixed point implementations or recursive filters
    2.
    发明授权
    Reducing steady state error in fixed point implementations or recursive filters 有权
    减少固定点实现或递归过滤器中的稳态误差

    公开(公告)号：US08832169B2

    公开(公告)日：2014-09-09

    申请号：US13293498

    申请日：2011-11-10

    申请人： Vignesh Sethuraman

    发明人： Vignesh Sethuraman

    IPC分类号： G06F17/10 ,  H03H17/02 ,  H03H17/04

    CPC分类号： H03H17/0219 ,  H03H17/0461 ,  H03H2017/022

    摘要： One feature includes a method for implementing a fixed point recursive filter that reduces or eliminates steady state error. The method comprises obtaining a first filter state value, processing the first filter state value to remove a scaling factor to obtain a second filter state value, ascertaining that the recursive filter has reached a steady state, determining a nonlinear drift parameter based on a difference between the first filter state value and the second filter state value multiplied by the scaling factor, and adjusting the second filter state value with the nonlinear drift parameter to reduce steady state error of the recursive filter. Ascertaining that the recursive filter has reached the steady state may include determining that a filter output value at time n is equal to a filter output value at time n−1.

    摘要翻译： 一个特征包括实现减少或消除稳态误差的定点递归滤波器的方法。 该方法包括获得第一滤波器状态值，处理第一滤波器状态值以去除缩放因子以获得第二滤波器状态值，确定递归滤波器已经达到稳定状态，基于第一滤波器状态值之间的差异来确定非线性漂移参数 第一滤波器状态值和第二滤波器状态值乘以比例因子，并且利用非线性漂移参数来调整第二滤波器状态值以减小递归滤波器的稳态误差。 确定递归滤波器已经达到稳定状态可以包括确定时间n处的滤波器输出值等于时间n-1处的滤波器输出值。

    Limit-cycle-free FIR/IIR halfband digital filter with shared registers for high-speed sigma-delta A/D and D/A converters
    4.
    发明申请
    Limit-cycle-free FIR/IIR halfband digital filter with shared registers for high-speed sigma-delta A/D and D/A converters 有权
    具有高速Σ-ΔA / D和D / A转换器共享寄存器的无限周期FIR / IIR半带数字滤波器

    公开(公告)号：US20040208241A1

    公开(公告)日：2004-10-21

    申请号：US10417507

    申请日：2003-04-17

    发明人： Zhongnong Jiang

    IPC分类号： H03K005/159 ,  H03H007/30 ,  H03H007/40

    CPC分类号： H03H17/0294 ,  H03H17/0292 ,  H03H17/0461 ,  H03H2017/0466 ,  H03H2218/08

    摘要： A multiplexed FIR/IIR digital filter structure (300) which offers linear phase response and low group delay by switching on a FIR filter portion (31) or a IIR filter portion (32). To reduce the silicon area, the FIR/IIR filter (300) shares registers which is enabled because the FIR and IIR processing do not use the registers at the same time but rather consecutively. Further, the multiplexed FIR/IIR digital filter structure (300) can offer limit-cycle-free IIR operation using two's-complement truncation in combination with positive valued allpass coefficients.

    摘要翻译： 多路FIR / IIR数字滤波器结构（300），其通过接通FIR滤波器部分（31）或IIR滤波器部分（32）来提供线性相位响应和低群延迟。 为了减少硅面积，FIR / IIR滤波器（300）共享寄存器，因为FIR和IIR处理不能同时使用寄存器，而是连续使用。 此外，多路复用FIR / IIR数字滤波器结构（300）可以提供使用二进制补码截断与正值全通系数组合的无限周期的IIR操作。

    Recursive digital filter
    5.
    发明授权
    Recursive digital filter 失效
    递归数字滤波器

    公开(公告)号：US4569030A

    公开(公告)日：1986-02-04

    申请号：US445347

    申请日：1982-11-29

    申请人： Hans-Jurgen Butterweck ,  Adrianus C. P. van Meer ,  Gerard Verkroost

    发明人： Hans-Jurgen Butterweck ,  Adrianus C. P. van Meer ,  Gerard Verkroost

    IPC分类号： H03H17/04 ,  G06F15/31

    CPC分类号： H03H17/0461

    摘要： A recursive digital filter includes a first circuit 1 including a cascade arrangement of a magnitude truncation quantizing arrangement and an adder 6, 8. The first circuit has an output 5, and also inputs 3 and 4, output 5 being connected to the input 3 via a second circuit 10 and to the input 4 via a third circuit 11. Both last-mentioned circuits are formed by a cascade arrangement of an auxiliary circuit 12 and 14, respectively, and a multiplier arrangement 13 and 15, respectively. The auxiliary circuit 12 has a transfer function H.sub.1 (z)=p/(z-1) and the auxiliary circuit 14 has a transfer function H.sub.2 (z)=q/(z+1), wherein p and q represent constants.

    摘要翻译： 递归数字滤波器包括第一电路1，其包括幅度截断量化装置的级联布置和加法器6,8。第一电路具有输出5，并且还输入3和4，输出5通过输入3连接到输入3 第二电路10和经由第三电路11的输入4.两个最后提到的电路分别由辅助电路12和14的级联布置以及乘法器装置13和15分别形成。 辅助电路12具有传递函数H1（z）= p /（z-1），辅助电路14具有传递函数H2（z）= q /（z + 1），其中p和q表示常数。

    Recursive type digital filter
    6.
    发明授权
    Recursive type digital filter 失效
    递归式数字滤波器

    公开(公告)号：US4305133A

    公开(公告)日：1981-12-08

    申请号：US94915

    申请日：1979-11-16

    申请人： Eiichi Amada ,  Makoto Ohnishi ,  Hiroshi Kuwahara

    发明人： Eiichi Amada ,  Makoto Ohnishi ,  Hiroshi Kuwahara

    IPC分类号： H03H17/00 ,  H03H17/04 ,  G06F15/31 ,  G06F7/48

    CPC分类号： H03H17/0405 ,  H03H17/0461

    摘要： A recursive type digital filter receiving a digital input signal x(n) having a plurality of bits and delivering a ditial output signal y(n) satisfying the following equation, ##EQU1## where n indicates a natural number, M and N orders of time lag in the signal transference, a.sub.k and b.sub.k coefficients defined by a filter characteristic, a.sub.M and b.sub.N b being coefficients which are not equal to zero, comprises an output control circuit for delivering a digital signal indicating a positive or negative limit value in place of the digital output signal y(n) when the amplitude of the signal y(n) exceeds an allowable value. In combination with this output control circuit, the filter also utilizes a feedback signal for calculation purposes which feedback signal has its amplitude reduced from that of y(n) by a predetermined ratio. Further, an arrangement is provided for clearing registers of filter when necessary to prevent overflow oscillation.

    摘要翻译： 接收具有多个位的数字输入信号x（n）的递归型数字滤波器，并输出满足以下等式的初始输出信号y（n），其中n表示自然数，M和N个时间顺序 信号传输滞后，由滤波器特性aM和bN b定义的ak和bk系数是不等于零的系数，包括输出控制电路，用于传送指示正或负极限值的数字信号代替 数字输出信号y（n），当信号y（n）的振幅超过允许值时。 与该输出控制电路相结合，滤波器还利用反馈信号进行计算，将反馈信号的幅度从y（n）的幅度减小预定比例。 此外，为了防止溢出振荡，需要设置清除滤波器的寄存器的结构。

    Recursive digital filter
    7.
    发明授权
    Recursive digital filter 失效
    递归数字滤波器

    公开(公告)号：US3997770A

    公开(公告)日：1976-12-14

    申请号：US484121

    申请日：1974-06-28

    申请人： Theodoor Antonius Carel Maria Claasen ,  Wolfgang Friedrich Georg Mecklenbrauker ,  Johannes Bernhard Heinrich Peek

    发明人： Theodoor Antonius Carel Maria Claasen ,  Wolfgang Friedrich Georg Mecklenbrauker ,  Johannes Bernhard Heinrich Peek

    IPC分类号： H03H17/04 ,  G06F15/20

    CPC分类号： H03H17/0461

    摘要： Recursive digital filter comprising at least two digital delay devices, a multiplying device having two inputs which are coupled to one another in a common branch point, a summing device from which a sum signal is derived the magnitude of which is at least equal to the sum of the output signal of the multiplying device, and a feedback circuit connected between the output of the summing device and the distribution point. The feedback circuit is provided with a discarding device which acts on numbers given in sign-and-magnitude representation and which by means of magnitude truncation restricts the number of bits of the numbers applied to the branch point.

    摘要翻译： 包括至少两个数字延迟装置的递归数字滤波器，具有在公共分支点中彼此耦合的两个输入的乘法装置，求和装置，从其推导和信号的幅度至少等于总和 的乘法装置的输出信号，以及连接在求和装置的输出与分配点之间的反馈电路。 反馈电路设有一个废弃装置，其作用于符号和幅度表示中给出的数字，并且通过幅度截断来限制应用于分支点的数字的位数。

    Digital filter employing serial arithmetic
    8.
    发明授权
    Digital filter employing serial arithmetic 失效
    数字滤波器采用串行算术

    公开(公告)号：US3714402A

    公开(公告)日：1973-01-30

    申请号：US3714402D

    申请日：1971-12-20

    申请人： BELL TELEPHONE LABOR INC

    发明人： BAUMWOLSPINER M

    IPC分类号： H03H17/04 ,  G06F7/38 ,  G06F1/02 ,  G06F15/34

    CPC分类号： H03H17/0461 ,  H03H17/04

    摘要： Second-order digital filtering apparatus requiring a relatively small number of components and therefore suitable for fabrication as a small number of integrated circuits. The filter is simplified by a novel organization and by the use of serial arithmetic throughout.

    摘要翻译： 二阶数字滤波装置需要相对较少数量的元件，因此适合作为少量集成电路的制造。 过滤器由一个新颖的组织和整个使用串行算术简化。

    Digital filter having improved overload recovery characteristics
    9.
    发明授权
    Digital filter having improved overload recovery characteristics 有权
    具有改进的过载恢复特性的数字滤波器

    公开(公告)号：US07660839B1

    公开(公告)日：2010-02-09

    申请号：US11232808

    申请日：2005-09-22

    申请人： John Melanson

    发明人： John Melanson

    IPC分类号： G06F17/10

    CPC分类号： H03H17/04 ,  H03H17/0461

    摘要： A digital filter having improved overload characteristics provides improved performance in audio equalizers and other systems. In contrast to a standard digital filter, clipping is enforced at the output of the filter and an integrator is used to implement the first filter stage, which is then followed by another stage that may be a unit delay or an integrator. Scalers and combiners are provided to scale an input signal representation and the output signal representation and combine them to provide the particular coefficient inputs to the integrator and the second stage forming a direct form filter. The resulting filter implements the same transfer function as a corresponding direct form filter, with an improved recovery from internal overload conditions. Higher-order filters can be formed by cascading the second-order filters formed by multiple integrator/second stage pairs.

    摘要翻译： 具有改进的过载特性的数字滤波器在音频均衡器和其他系统中提供改进的性能。 与标准数字滤波器相反，在滤波器的输出处强制削波，并且使用积分器来实现第一滤波器级，然后跟随可以是单位延迟或积分器的另一级。 提供定标器和组合器以缩放输入信号表示和输出信号表示，并将它们组合以向积分器提供特定系数输入，并且第二级形成直接形式滤波器。 所得到的滤波器实现与相应的直接形式滤波器相同的传递函数，具有从内部过载条件改进的恢复。 可以通过级联由多个积分器/第二级对形成的二阶滤波器来形成高阶滤波器。