摘要:
In an arrangement for testing an integrated circuit comprising at least two circuit sections (1, 2) which in normal operation operate with at least two different clock signals, a minimal number of test runs for testing the integrated circuit is required because the integrated circuit to be tested is formed in such a way that each clock signal can be individually switched on and off during a test by test software provided in the arrangement, a software model of the circuit to be tested is provided in the arrangement, which software model comprises an X generator (38, 40) for those circuit components (33, 35) whose mode of operation is influenced by a plurality of clock signals and their skew behavior, which X generator is activated and supplies an X signal when more than one clock signal influencing the mode of operation of the circuit components (33, 35) during testing is activated, while, during testing, the test software initially activates all clock signals and evaluates test results for those circuit components (3, 5) for which no X signal appears in the software model (33, 35), and because for those circuit components (3, 5) for which an X signal appeared in the software model (33, 35) during testing with all clock signals, the test software performs a plurality of test runs in which each time only one or more of the clock signals influencing the mode of operation of the circuit component (3, 5) is/are activated and evaluates only those tests of the circuit components (3, 5) of the circuit for which no X signal appears in the software model (33, 35).
摘要:
A preferred system for facilitating automated test equipment functionality within integrated circuits includes automated test equipment (ATE) configured to electrically interconnect with an integrated circuit and to provide at least one signal to the integrated circuit. A first parametric test circuit, internal to the integrated circuit, also is provided. The first parametric test circuit is adapted to electrically communicate with the automated test equipment so that, in response to receiving a signal from the automated test equipment, the first parametric test circuit measures at least one parameter of a first pad of the integrated circuit.
摘要:
The invention relates to a method for measuring the effects of on-chin noise on signal propagation comprising measuring an inactive operating frequency of a first test circuit having a first plurality of elements connected by a first plurality of traces, measuring an inactive operating frequency of a second test circuit having a second plurality of elements connected by a second plurality of traces, measuring an inactive operating frequency of a third test circuit having a third plurality of elements connected by a third plurality of traces, and measuring an inactive operating frequency of a fourth test circuit having a fourth plurality of elements connected by a fourth plurality of traces, wherein the inactive operating frequencies of the first second, third, and fourth test circuits represent one or more effects of on-chin noise on signal propagation.
摘要:
A preferred system for facilitating automated test equipment functionality within integrated circuits includes automated test equipment (ATE) configured to electrically interconnect with an integrated circuit and to provide at least one signal to the integrated circuit. A first parametric test circuit, internal to the integrated circuit, also is provided. The first parametric test circuit is adapted to electrically communicate with the automated test equipment so that, in response to receiving a signal from the automated test equipment, the first parametric test circuit measures at least one parameter of a first pad of the integrated circuit.