Arrangement and method of testing an integrated circuit
    1.
    发明授权
    Arrangement and method of testing an integrated circuit 失效
    集成电路测试的布置和测试方法

    公开(公告)号:US06789219B2

    公开(公告)日:2004-09-07

    申请号:US09923614

    申请日:2001-08-07

    IPC分类号: G01R313187

    CPC分类号: G01R31/3185 G01R31/318552

    摘要: In an arrangement for testing an integrated circuit comprising at least two circuit sections (1, 2) which in normal operation operate with at least two different clock signals, a minimal number of test runs for testing the integrated circuit is required because the integrated circuit to be tested is formed in such a way that each clock signal can be individually switched on and off during a test by test software provided in the arrangement, a software model of the circuit to be tested is provided in the arrangement, which software model comprises an X generator (38, 40) for those circuit components (33, 35) whose mode of operation is influenced by a plurality of clock signals and their skew behavior, which X generator is activated and supplies an X signal when more than one clock signal influencing the mode of operation of the circuit components (33, 35) during testing is activated, while, during testing, the test software initially activates all clock signals and evaluates test results for those circuit components (3, 5) for which no X signal appears in the software model (33, 35), and because for those circuit components (3, 5) for which an X signal appeared in the software model (33, 35) during testing with all clock signals, the test software performs a plurality of test runs in which each time only one or more of the clock signals influencing the mode of operation of the circuit component (3, 5) is/are activated and evaluates only those tests of the circuit components (3, 5) of the circuit for which no X signal appears in the software model (33, 35).

    摘要翻译: 在用于测试包括至少两个电路部分(1,2)的集成电路的装置中,所述至少两个电路部分(1,2)在正常操作中使用至少两个不同的时钟信号进行操作,因此需要最小数量的用于测试集成电路的测试运行,因为集成电路 被测试形成为使得每个时钟信号可以在测试期间通过在该布置中提供的测试软件进行单独接通和关断,在该布置中提供要测试的电路的软件模型,该软件模型包括 X发生器(38,40),用于那些其工作模式受多个时钟信号及其歪斜行为影响的电路部件(33,35),当多于一个时钟信号影响时,X发生器被激活并提供X信号 在测试期间电路组件(33,35)的操作模式被激活,而在测试期间,测试软件最初激活所有时钟信号并评估测试结果 对于在软件模型(33,35)中没有X信号出现的那些电路组件(3,5),并且因为对于在软件模型(33,31)中出现X信号的那些电路组件(3,5) 在测试期间,测试软件执行多个测试运行,其中每次仅影响影响电路组件(3,5)的操作模式的一个或多个时钟信号被激活并且评估 只有在软件模型(33,35)中没有出现X信号的电路的电路组件(3,5)的测试。

    Systems and methods for facilitating automated test equipment functionality within integrated circuits
    2.
    发明授权
    Systems and methods for facilitating automated test equipment functionality within integrated circuits 失效
    用于促进集成电路内自动测试设备功能的系统和方法

    公开(公告)号:US06741946B2

    公开(公告)日:2004-05-25

    申请号:US10383323

    申请日:2003-03-07

    IPC分类号: G01R313187

    CPC分类号: G01R31/3187

    摘要: A preferred system for facilitating automated test equipment functionality within integrated circuits includes automated test equipment (ATE) configured to electrically interconnect with an integrated circuit and to provide at least one signal to the integrated circuit. A first parametric test circuit, internal to the integrated circuit, also is provided. The first parametric test circuit is adapted to electrically communicate with the automated test equipment so that, in response to receiving a signal from the automated test equipment, the first parametric test circuit measures at least one parameter of a first pad of the integrated circuit.

    摘要翻译: 用于促进集成电路内的自动测试设备功能的优选系统包括被配置为与集成电路电互连并且向集成电路提供至少一个信号的自动测试设备(ATE)。 还提供了集成电路内部的第一参数测试电路。 第一参数测试电路适于与自动测试设备电通信,使得响应于接收到来自自动测试设备的信号,第一参数测试电路测量集成电路的第一焊盘的至少一个参数。

    Apparatus and method for determining effect of on-chip noise on signal propagation
    3.
    发明授权
    Apparatus and method for determining effect of on-chip noise on signal propagation 失效
    用于确定片上噪声对信号传播的影响的装置和方法

    公开(公告)号:US06807502B2

    公开(公告)日:2004-10-19

    申请号:US10443389

    申请日:2003-05-22

    申请人: William E. Corr

    发明人: William E. Corr

    IPC分类号: G01R313187

    摘要: The invention relates to a method for measuring the effects of on-chin noise on signal propagation comprising measuring an inactive operating frequency of a first test circuit having a first plurality of elements connected by a first plurality of traces, measuring an inactive operating frequency of a second test circuit having a second plurality of elements connected by a second plurality of traces, measuring an inactive operating frequency of a third test circuit having a third plurality of elements connected by a third plurality of traces, and measuring an inactive operating frequency of a fourth test circuit having a fourth plurality of elements connected by a fourth plurality of traces, wherein the inactive operating frequencies of the first second, third, and fourth test circuits represent one or more effects of on-chin noise on signal propagation.

    摘要翻译: 本发明涉及一种用于测量接通噪声对信号传播的影响的方法,包括测量第一测试电路的无效工作频率,该第一测试电路具有由第一多个迹线连接的第一多个元件,测量第一多个元件的非工作频率 第二测试电路具有通过第二多个迹线连接的第二多个元件,测量具有通过第三多个迹线连接的第三多个元件的第三测试电路的不活动工作频率,以及测量第四个 测试电路具有通过第四多个迹线连接的第四多个元件,其中第一第二,第三和第四测试电路的无效工作频率表示对信号传播的下巴噪声的一个或多个影响。

    Systems and methods for facilitating automated test equipment functionality within integrated circuits
    4.
    发明授权
    Systems and methods for facilitating automated test equipment functionality within integrated circuits 失效
    用于促进集成电路内自动测试设备功能的系统和方法

    公开(公告)号:US06556938B1

    公开(公告)日:2003-04-29

    申请号:US09649797

    申请日:2000-08-29

    IPC分类号: G01R313187

    CPC分类号: G01R31/3187

    摘要: A preferred system for facilitating automated test equipment functionality within integrated circuits includes automated test equipment (ATE) configured to electrically interconnect with an integrated circuit and to provide at least one signal to the integrated circuit. A first parametric test circuit, internal to the integrated circuit, also is provided. The first parametric test circuit is adapted to electrically communicate with the automated test equipment so that, in response to receiving a signal from the automated test equipment, the first parametric test circuit measures at least one parameter of a first pad of the integrated circuit.

    摘要翻译: 用于促进集成电路内的自动测试设备功能的优选系统包括被配置为与集成电路电互连并且向集成电路提供至少一个信号的自动测试设备(ATE)。 还提供了集成电路内部的第一参数测试电路。 第一参数测试电路适于与自动测试设备电通信,使得响应于接收到来自自动测试设备的信号,第一参数测试电路测量集成电路的第一焊盘的至少一个参数。