公开(公告)号：US20020060598A1

公开(公告)日：2002-05-23

申请号：US09940472

申请日：2001-08-29

申请人： NEC CORPORATION

发明人： Katsuji Kimura

IPC分类号： G06G007/14

CPC分类号： H03F3/45717 ,  G06G7/14 ,  H03F3/45183 ,  H03F3/4565 ,  H03F3/4569 ,  H03F3/45708 ,  H03F3/45739 ,  H03F2203/45456 ,  H03F2203/45484 ,  H03F2203/45566 ,  H03F2203/45612 ,  H03F2203/45702

摘要： A voltage subtractor/adder circuit comprises a differential pair having first and second MOS transistors. Gate electrodes of the first and second MOS transistors form input terminals for receiving an input differential voltage. Drain electrodes of the first and second MOS transistors form output terminals for outputting a subtraction output signal. Source electrodes of the first and second MOS transistors are commonly coupled to form an output terminal for addition output voltage. The sum of currents flowing through the first and second MOS transistors increases in proportion to the square of the input differential voltage. It is also possible to drive the differential pair by a constant current source. A level shifter may be provided for level-shifting the addition output voltage from the commonly coupled source electrodes.

摘要翻译： 电压减法器/加法器电路包括具有第一和第二MOS晶体管的差分对。 第一和第二MOS晶体管的栅电极形成用于接收输入差分电压的输入端。 第一和第二MOS晶体管的漏极形成用于输出减法输出信号的输出端。 第一和第二MOS晶体管的源电极共同耦合以形成用于加法输出电压的输出端。 流过第一和第二MOS晶体管的电流的总和与输入差分电压的平方成比例地增加。 也可以通过恒定电流源来驱动差分对。 可以提供电平移位器用于对来自共同耦合的源电极的相加输出电压进行电平移位。

公开(公告)号：US20040104758A1

公开(公告)日：2004-06-03

申请号：US10720331

申请日：2003-11-25

发明人： Antonio Romano

IPC分类号： G06G007/14

CPC分类号： H03D7/125

摘要： A sub-harmonic mixer comprises two field effect transistors in which the sources of the transistors are connected together and the drains of the transistors are connected together. The mixer includes signal generating means for generating a local oscillator (LO) signal coupled to the gate of one of the FETs. Circuit means is provided for maintaining the potential of the gate of the other FET at a substantially constant value relative to the local oscillator signal applied to the gate of the driven FET, and the FET's are arranged to permit the local oscillator signal applied to gate of the driven FET to drive a voltage across the gate-source of both FET's. An input and output port is coupled to the drains for receiving input signals for the mixer and outputting output signals from the mixer.

摘要翻译： 子谐波混频器包括两个场效应晶体管，其中晶体管的源极连接在一起，并且晶体管的漏极连接在一起。 该混频器包括用于产生耦合到一个FET的门的本地振荡器（LO）信号的信号发生装置。 提供电路装置，用于将另一个FET的栅极的电位保持在相对于施加到被驱动FET的栅极的本地振荡器信号基本上恒定的值，并且FET被布置成允许施加到栅极的本地振荡器信号 驱动FET驱动两个FET的栅极源极之间的电压。 输入和输出端口连接到排水管，用于接收混频器的输入信号，并输出混频器的输出信号。

公开(公告)号：US20010050588A1

公开(公告)日：2001-12-13

申请号：US09918834

申请日：2001-08-01

申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V.

发明人： William Redman-White ,  Simon D. Bramwell

IPC分类号： G06G007/14

CPC分类号： H03M13/3961 ,  G06G7/14 ,  H03M13/4107

摘要： An arrangement for selecting the largest of a plurality of input currents (pma (k-1), pmb (k-1)) and adding a further current (Ibmk) to the selected current, the arrangement comprising: a plurality of inputs (901, 902) for receiving said input currents; a further input (905) for receiving said further current; an output (906, 907) for delivering an output current proportional to the sum of the largest of the input currents and the further current; means for feeding each of the received input currents to the main current conducting path of a respective transistor, (T900, T902) each of the transistors having its control electrode connected to a common point; a respective follower transistor (T901, T903) connected between the input and the common point; and a mirror transistor (T904) having its control electrode connected to the common point for producing a current whose value is related to that of the largest input current. The currents through transistors (T904, T907) are summed and sensed by a diode connected transistor (T905) whose gate voltage is stored on a capacitor (C900, C901) by means of respective switches (S900, S901). The voltages across the capacitors (C900, C901) are fed via respective switches (S902, S903) to the gate electrodes of transistors (T908, T909) whose drain electrodes feed an output current (pmc (k-1)) to outputs (906, 907) of the arrangement. A plurality of such arrangements are used for producing path metric currents for a Viterbi decoder.

摘要翻译： 一种用于选择多个输入电流中最大的输入电流（pma（k-1），pmb（k-1））并将另外的电流（Ibmk）加到所选择的电流的装置，该装置包括：多个输入端 ，902），用于接收所述输入电流; 用于接收所述另外的电流的另外的输入（905）; 输出（906,907），用于传送与最大输入电流和另外的电流的和成比例的输出电流; 用于将每个所接收的输入电流馈送到各个晶体管的主电流传导路径的装置（T900，T902），每个晶体管的控制电极连接到公共点; 连接在输入和公共点之间的相应跟随器晶体管（T901，T903） 以及其控制电极连接到公共点的反射镜晶体管（T904），用于产生与最大输入电流值相关的电流。 通过晶体管（T904，T907）的电流由栅极电压通过相应开关（C900，C901）存储在电容器（C900，C901）上的二极管连接的晶体管（T905）相加和感测（S900，S901）。 跨越电容器（C900，C901）的电压通过各自的开关（S902，S903）馈送到其漏极馈送输出电流（pmc（k-1））到输出端（906）的晶体管（T908，T909）的栅电极 ，907）。 多个这样的布置用于产生用于维特比解码器的路径度量电流。