Global planarization using a polyimide block
    1.
    发明授权
    Global planarization using a polyimide block 失效
    使用聚酰亚胺嵌段的全局平面化

    公开(公告)号:US5635428A

    公开(公告)日:1997-06-03

    申请号:US329108

    申请日:1994-10-25

    摘要: A semiconductor device includes conductor regions 24 and 26 on a layer of the semiconductor device; a first insulator layer 28 over and between the conductor regions 24 and 26; polyimide regions 30, 32, and 34 over the first insulator layer 28 in gaps between the conductor regions 24 and 26; and a second insulator layer 38 over the first insulator layer 28 and over the polyimide regions 30, 32, and 34. A surface of the second insulator layer 38 is substantially planar.

    摘要翻译: 半导体器件在半导体器件的层上包括导体区域24和26; 在导体区域24和26之间和之间的第一绝缘体层28; 在导体区域24和26之间的间隙中的第一绝缘体层28上的聚酰亚胺区域30,32和34; 以及在第一绝缘体层28上方以及聚酰亚胺区域30,32和34之上的第二绝缘体层38.第二绝缘体层38的表面基本上是平面的。